Marek Behún [Wed, 6 Apr 2022 22:32:57 +0000 (00:32 +0200)]
net: introduce helpers to get PHY ofnode from MAC
Add helpers ofnode_get_phy_node() and dev_get_phy_node() and use it in
net/mdio-uclass.c function dm_eth_connect_phy_handle(). Also add
corresponding UT test.
This is useful because other part's of U-Boot may want to get PHY ofnode
without connecting a PHY.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Haolin Li [Sat, 19 Mar 2022 14:02:42 +0000 (07:02 -0700)]
net: phy: dp83867: Fix a never true comparison
The type of the return value of phy_read() and phy_read_mmd() is int.
Change the variable to not be unsigned so that we not get into an
unsigned compared against 0.
Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Wed, 23 Feb 2022 13:20:56 +0000 (15:20 +0200)]
net: phy: atheros: avoid error in ar803x_of_init() when PHY has no OF node
A DM_ETH driver may use phy_connect() towards a PHY address on an MDIO
bus which is not specified in the device tree, as evidenced by:
pfe_eth_probe
-> pfe_phy_configure
-> phy_connect
When this happens, the PHY will have an invalid OF node.
When ar803x_config() runs, it silently fails at ar803x_of_init(), and
therefore, fails to run the rest of the initialization.
This makes MII_BMCR contain what it had after BMCR_RESET (0x8000) has
been written into it by phy_reset(). Since BMCR_RESET is volatile and
self-clearing, the MII_BMCR ends up having a value of 0x0. The further
configuration of this register, which is supposed to be handled by
genphy_config_aneg() lower in ar803x_config(), never gets a chance to
run due to this early error from ar803x_of_init().
As a result of having MII_BMCR as 0, the following symptom appears:
=> setenv ethact pfe_eth0
=> setenv ipaddr 10.0.0.1
=> ping 10.0.0.2
pfe_eth0 Waiting for PHY auto negotiation to complete......... TIMEOUT !
Could not initialize PHY pfe_eth0
Manually writing 0x1140 into register 0 of the PHY makes the connection
work, but it is rather desirable that the port works without any manual
intervention.
Fixes: fe6293a80959 ("phy: atheros: add device tree bindings and config") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Wed, 23 Feb 2022 13:20:55 +0000 (15:20 +0200)]
net: phy: dp83867: avoid error in dp83867_of_init() when PHY has no OF node
A DM_ETH driver may use phy_connect() towards a PHY address on an MDIO
bus which is not specified in the device tree, as evidenced by:
pfe_eth_probe
-> pfe_phy_configure
-> phy_connect
When this happens, the PHY will have an invalid OF node.
The dp83867_config() method has extra initialization steps which are
bypassed when the PHY lacks an OF node, which is undesirable because it
will lead to broken networking. Allow the rest of the code to run.
Fixes: 085445ca4104 ("net: phy: ti: Allow the driver to be more configurable") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tom Rini [Mon, 4 Apr 2022 12:26:55 +0000 (08:26 -0400)]
Merge tag 'u-boot-at91-2022.07-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.07 cycle:
This feature set includes the new driver for the Atmel TCB timer,
alignment in DT for sama7g5 and sama7g5ek board, one Kconfig conversion
for external reset, and the usage of Galois tables from ROM for sama5d2
device.
Tom Rini [Sat, 2 Apr 2022 19:28:43 +0000 (15:28 -0400)]
Merge branch '2022-04-01-arm-semihosting-cleanups-and-new-features' into next
This brings in two related series. The first from Andre:
This series is the continuation of last year's effort to support the new
Armv8-R64 application profile. This led to a significant rework of the
existing fastmodel (FVP) support, to both upgrade it to newest U-Boot
standards (OF_CONTROL and distro_boot support), but also to generalise
the code, so that plugging in the v8-R64 support in the last patch gets
much easier. This is because apart from the twisted memory map between
the two profiles there is actually little difference, when it comes to
U-Boot relevant parts of the hardware.
I kept the legacy semihosting support (which picks up magic files from
the current directory), but if that fails, we go and try virtio-blk
(.iso installer images work), then virtio-net.
Please have a look, and give it a try, if possible. Both the v8-R and
v8-A FVP models are available for free on the Arm website[1].
Patch 01/11 fixes a regression introduced in December, it should be
applied now. The rest of the patches are for the next merge window.
And the second from Sean (where we exclude 27, 28 and 29 for now):
This cleans up the semihosting code and adds the following new features:
- hostfs support (like sandbox)
- support for being used as a SPL boot device
- serial device support
- falling back to normal drivers if semihosting is disabled
The main device affected by these changes is vexpress64, so I'd
appreciate
if Andre (or anyone else) could try booting.
These changes are motivated by bringup for ls1046a. When forcing JTAG
boot, this device disables most communication peripherals, including
serial and ethernet devices. This appears to be fixed in later
generation devices, but we are stuck with it for now. Semihosting
provides an easy way to run a few console commands.
The patches in this series are organized as follows:
0-4: rST conversions and other documentation updates
5-9: Semihosting cleanups
10-14: Filesystem support (including SPL boot device)
15-16: Serial support
16: Documentation update
17: JTAG boot support for LS1046A
19-25: Semihosting fallback
26-29: DM puts support
The last two groups of patches are "bonus;" the first 17 patches stand
on their own. The last two groups could be broken out as separate
series, but I have kept them in this one to help with my sanity (and not
have to deal with too many outstanding series).
Patch 14 depends on [1] to apply cleanly. Patch 17 depends on [2] for
correctness. This series should be applied to u-boot/next (in
particular, the EROFS series must have been applied).
Sean Anderson [Tue, 22 Mar 2022 20:59:34 +0000 (16:59 -0400)]
serial: dm: Add support for puts
Some serial drivers can be vastly more efficient when printing multiple
characters at once. Non-DM serial has had a puts option for these sorts
of drivers; implement it for DM serial as well.
Because we have to add carriage returns, we can't just pass the whole
string directly to the serial driver. Instead, we print up to the
newline, then print a carriage return, and then continue on. This is
less efficient, but it is better than printing each character
individually. It also avoids having to allocate memory just to add a few
characters.
Drivers may perform short writes (such as filling a FIFO) and return the
number of characters written in len. We loop over them in the same way
that _serial_putc loops over putc.
This results in around sizeof(void *) growth for all boards with
DM_SERIAL. The full implementation takes around 140 bytes.
Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Tue, 22 Mar 2022 20:59:33 +0000 (16:59 -0400)]
arm64: ls1046a: Support semihosting fallback
Use the semihosting_enabled function to determine whether or not to
enable semihosting devices. This allows for graceful fallback in the
event a debugger is not attached.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:32 +0000 (16:59 -0400)]
serial: smh: Initialize serial only if semihosting is enabled
If semihosting is disabled, then the user has no debugger attached, and
will not see any messages. Don't create a serial device in this
instance, to (hopefully) fall back on another working serial device.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:31 +0000 (16:59 -0400)]
arm64: Catch non-emulated semihosting calls
If a debugger is not attached to U-Boot, semihosting calls will raise a
synchronous abort exception. Try to catch this and disable semihosting
so we can e.g. use another uart if one is available. In the immediate
case, we return an error, since it is not always possible to check for
semihosting beforehand (debug uart, user-initiated load command, etc.)
We handle all possible semihosting instructions, which is probably
overkill. However, we do need to keep track of what instruction set
we're using so that we don't suppress an actual error.
A future enhancement could try to determine semihosting capability by
inspecting the processor state. There's an example of this at [1] for
RISC-V. The equivalent for ARM would inspect the monitor modei
enable/select bits of the DSCR. However, as the article notes, an
exception handler is still helpful in order to catch disconnected
debuggers.
Sean Anderson [Tue, 22 Mar 2022 20:59:30 +0000 (16:59 -0400)]
arm: smh: Add option to detect semihosting
These functions are intended to support detecting semihosting and
falling back gracefully to alternative implementations. The test starts
by making semihosting call. SYS_ERRNO is chosen because it should not
mutate any state. If this semihosting call results in an exception
(rather than being caught by the debugger), then the exception handler
should call disable_semihosting() and resume execution after the call.
Ideally, this would just be part of semihosting by default, and not a
separate config. However, to reduce space ARM SPL doesn't include
exception vectors by default. This means we can't detect if a
semihosting call failed unless we enable them. To avoid forcing them to
be enabled, we use a separate config option. It might also be possible
to try and detect whether a debugger has enabled (by reading HDE from
DSCR), but I wasn't able to figure out a way to do this from all ELs.
This patch just introduces the generic code to handle detection. The
next patch will implement it for arm64 (but not arm32).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 21:18:37 +0000 (17:18 -0400)]
arm64: Import some ESR and SPSR defines from Linux
This imports some defines for esr and spsr from Linux v5.16. I have
modified the includes and fixed some indentation nits but otherwise it
is the same. There are a lot more defines than we need, but it doesn't
hurt.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:28 +0000 (16:59 -0400)]
arm64: Save spsr in pt_regs
This register holds "pstate" which includes (among other things) the
instruction mode the CPU was in when the exception was taken. This is
necessary to correctly interpret instructions at elr.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 21:17:35 +0000 (17:17 -0400)]
arm64: Save esr in pt_regs
To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 21:16:05 +0000 (17:16 -0400)]
ls1046ardb: Add support for JTAG boot
This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).
These steps require LS1046A support in OpenOCD, which was added in [1].
Sean Anderson [Tue, 22 Mar 2022 20:59:24 +0000 (16:59 -0400)]
serial: Add semihosting driver
This adds a serial driver which uses semihosting calls to read and write
to the host's console. For convenience, if CONFIG_DM_SERIAL is enabled,
we will instantiate a serial driver. This allows users to enable this
driver (which has no physical device) without modifying their device
trees or board files. We also implement a non-DM driver for SPL, or for
much faster output in U-Boot proper.
There are three ways to print to the console:
Method Baud
================== =====
smh_putc in a loop 170
smh_puts 1600
smh_write with :tt 20000
================== =====
These speeds were measured using a 175 character message with a J-Link
adapter. For reference, U-Boot typically prints around 2700 characters
during boot on this board. There are two major factors affecting the
speed of these functions. First, each breakpoint incurs a delay. Second,
each debugger memory transaction incurs a delay. smh_putc has a
breakpoint and memory transaction for every character. smh_puts has one
breakpoint, but still has to use a transaction for every character. This
is because we don't know the length up front, so OpenOCD has to check if
each character is nul. smh_write has only one breakpoint and one memory
transfer.
DM serial drivers can only implement a putc interface, so we are stuck
with the slowest API. Non-DM drivers can implement puts, which is vastly
more efficient. When the driver starts up, we try to open :tt. Since
this is an extension, this may fail. If it does, we fall back to
smh_puts. We don't check :semihosting-features, since there are
nonconforming implementations (OpenOCD) which don't implement it (but
*do* implement :tt).
Some semihosting implementations (QEMU) don't handle READC properly. To
work around this, we try to use open/read (much like for stdin) if
possible.
There is no non-blocking I/O available, so we don't implement pending.
This will cause __serial_tstc to always return true. If
CONFIG_SERIAL_RX_BUFFER is enabled, _serial_tstc will try and read
characters forever. To avoid this, we depend on this config being
disabled.
Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Tue, 22 Mar 2022 20:59:23 +0000 (16:59 -0400)]
arm: smh: Add some functions for working with the host console
This adds three wrappers around the semihosting commands for reading and
writing to the host console. We use the more standard getc/putc/puts
names instead of readc/writec/write0 for familiarity.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:22 +0000 (16:59 -0400)]
arm: smh: Remove smhload command
This command's functionality is now completely implemented by the
standard fs load command. Convert the vexpress64 boot command (which is
the only user) and remove the implementation.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:21 +0000 (16:59 -0400)]
cmd: fdt: Use start/size for chosen instead of start/end
Most U-Boot command deal with start/size instead of start/end. Convert
the "fdt chosen" command to use these semantics as well. The only user
of this subcommand is vexpress, so convert the smhload command to use
this as well. We don't bother renaming the variable in vexpress64's
bootcommand, since it will be rewritten in the next commit.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:20 +0000 (16:59 -0400)]
fs: Add semihosting filesystem
This adds a filesystem which is backed by the host's filesystem. It is
modeled off of sandboxfs, which has very similar aims. Semihosting
doesn't support listing directories (except with SYS_SYSTEM), so neither
do we. it's possible to optimize a bit for the common case of reading a
whole file by omitting a call to smh_seek, but this is left as a future
optimization.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:19 +0000 (16:59 -0400)]
spl: Add semihosting boot method
This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.
To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.
I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:
- Implementing DDR initialization through JTAG (typically with dozens of
lines of TCL) and then loading U-Boot. The DDR initialization
typically uses hard-coded register writes, and is not easily adapted
to different boards. BOOT_DEVICE_SMH allows booting with SPL,
leveraging U-Boot's existing DDR initialization code. This is the
method used by NXP's CodeWarrior IDE on Layerscape processors (see
AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
then loading U-Boot. This is tricky, because the debugger must stop the
boot after the bootloader has completed its work. Trying to load
U-Boot too early can cause failure to boot. This is the method used by
Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
image to load U-Boot at the appropriate place. This can be a bit
tricky, because the load address is dependent on the header size. An
elf with symbols must also be used in order to stop at the appropriate
point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
where SPL automatically stops and tells the host where to place the
image.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:16 +0000 (16:59 -0400)]
arm: smh: Return errno on error
Instead of printing in what are now library functions, try to return a
numeric error code. This also adjust some functions (such as read) to
behave more similarly to read(2). For example, we now return the number
of bytes read instead of failing immediately on a short read.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:15 +0000 (16:59 -0400)]
arm: smh: Use numeric modes for smh_open
There's no point in using string constants for smh_open if we are just
going to have to parse them. Instead, use numeric modes. The user needs
to be a bit careful with these, since they are much closer semantically
to string modes used by fopen(3) than the numeric modes used with
open(2).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:14 +0000 (16:59 -0400)]
arm: smh: Export semihosting functions
This exports semihosting functions for use in other files. The header is
in include/ and not arm/include/asm because I anticipate that RISC-V may
want to add their own implementation at some point.
smh_len_fd has been renamed to smh_flen to more closely match the
semihosting spec.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 22 Mar 2022 20:59:13 +0000 (16:59 -0400)]
arm: smh: Add semihosting entry to MAINTAINERS
These files are spread all over the tree, so just use a regex. Orphaned
for now, since this is more of a "one-off" series. Though I'll be happy
to review patches.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Peter Hoyes [Fri, 4 Mar 2022 16:30:18 +0000 (16:30 +0000)]
vexpress64: Add ARMv8R-64 board variant
The ARMv8-R64 architecture introduces optional VMSA (paging based MMU)
support in the EL1/0 translation regime, which makes that part mostly
compatible to ARMv8-A.
Add a new board variant to describe the "BASE-R64" FVP model, which
inherits a lot from the existing v8-A FVP support. One major difference
is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at
2GB [1].
* Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the
exising configuration.
* Implement inverted memory map in vexpress_aemv8.h
* Create vexpress_aemv8r defconfig
* Provide an MMU memory map for the BASER_FVP
* Update vexpress64 documentation
At the moment the boot-wrapper is the only supported secure firmware. As
there is no official DT for the board yet, we rely on it being supplied
by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with
a dummy DT for now.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
[Andre: rebase and add Linux kernel header] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[trini: Add MAINTAINERS entry for Peter]
Andre Przywara [Fri, 4 Mar 2022 16:30:17 +0000 (16:30 +0000)]
vexpress64: pick DRAM size from DT
So far the DRAM size for both the Juno and the FVP model were hardcoded
in our config header file. For the Juno this is fine, as all models have
8 GiB of DRAM, but the DRAM size can be configured on the model command
line.
Drop the fixed DRAM size setup, instead look up the size in the device
tree, that we now have for every board. This allows a user to inject
a DT with the proper size, and be able to use the full amount of DRAM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Fri, 4 Mar 2022 16:30:16 +0000 (16:30 +0000)]
vexpress64: generalise page table generation
In preparation for the ARMv8-R64 FVP support, which has DRAM mapped at
0x0, generalise the page table generation, by using symbolic names for
the address ranges instead of fixed numbers.
We already define the base of the DRAM and MMIO regions, so just use
those symbols in the page table description. Rename V2M_BASE to the more
speaking V2M_DRAM_BASE on the way.
On the VExpress memory map, the address space right after 4GB is of no
particular interest to software, as the whole of DRAM is mapped at 32GB
instead. The first 2 GB alias to the lower 2GB of DRAM mapped below 4GB,
so we skip this part and map some more of the high DRAM, should anyone
need it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Fri, 4 Mar 2022 16:30:15 +0000 (16:30 +0000)]
vexpress64: defconfigs: allow default commands
Right now the defconfig the Arm VExpress64 boards disables quite some
standard commands, for apparently no good reasons (as image size is
hardly a concern here).
Remove the lines explicitly disabling those features, leaving it to
the U-Boot default settings to set them.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Fri, 4 Mar 2022 16:30:14 +0000 (16:30 +0000)]
vexpress64: fvp: add distro_boot support
So far the FVP model just supports booting through semihosting, so by
loading files from the host the model is running on. This allows for
quick booting of new kernels (or replacing DTBs), but prevents more
featureful boots like using UEFI.
Enable the distro_boot feature, and provide a list of possible boot
sources that U-Boot should check:
- For backwards compatibility we start with semihosting, which gets its
commands migrated from CONFIG_BOOTCOMMAND into the distro_boot
infrastructure. This is also slightly tweaked to fail graceful in case
the required files could not be found.
- Next we try to use a user provided script, that could be easily
placed into memory using the model command line.
- Since we gained virtio support with the enablement of OF_CONTROL,
let's check virtio block devices next. This is where UEFI boot can
be easily used, for instance by providing a distro installer .iso
file through virtio-blk.
- Networking is now provided by virtio as well, so enable the default
PXE and DHCP boot flows, mostly because we can.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Fri, 4 Mar 2022 16:30:13 +0000 (16:30 +0000)]
vexpress64: move hardware setting from defconfig to Kconfig
The defconfigs for the Arm Juno board and the FVP model are quite large,
setting a lot of platform-fixed variables like SYS_TEXT_BASE.
As those values are not really a user choice, let's provide default
values for them in our Kconfig file, so a lot of cruft can be removed
from the defconfig files.
This also moves the driver selection out of there, since this is again
not something a user should really decide on. Instead we allow users to
enable or disable subsystems, and select the appropriate drivers based
on that in the Kconfig file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The definition of the standard environment variables (kernel_addr_r and
friends) has been improved lately for the FVP model, but the Juno board
is still using some custom scheme.
Since we need to extend this to a third board soon, let's unify the
definition:
- Define the Juno addresses in the same generic way we do for the FVP
model, and move the actual variable setting out of the board #ifdef's.
- Add the missing addresses for a PXE file and a boot script.
- Cleanup some stale comments on the way.
As the FVP model doesn't have support for distro_boot quite yet, add
a dummy definition for now, to be replaced with the real thing later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Fri, 4 Mar 2022 16:30:11 +0000 (16:30 +0000)]
vexpress64: fvp: enable OF_CONTROL
The FVP base model is relying on a DT for Linux operation, so there is
no reason we would need to rely on hardcoded information for U-Boot.
Letting U-Boot use a DT will open up the usage of actual peripherals,
beyond the support for semihosting only.
Enable OF_CONTROL in the Kconfig, and use the latest dts files from
Linux. Depending on whether we use the boot-wrapper or TF-A, there is
already a DTB provided or not, respectively.
To cover the boot-wrapper, we add an arm64 Linux kernel header, which
allows the boot-wrapper to treat U-Boot like a Linux kernel. U-Boot will
find the pointer to the DTB in x0, and will use it.
Even though TF-A carries a DT, at the moment this is not made available
to non-secure world, so to not break users, we use the U-Boot provided
DTB copy in that case. For some reason TF-A puts some DT like structure
at the address x0 is pointing at, but that is very small and doesn't
carry any hardware information. Make the code to ignore those small DTBs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Fri, 4 Mar 2022 16:30:09 +0000 (16:30 +0000)]
vexpress64: Kconfig: move board definitions out of arch/arm
At the moment we define three "VExpress64" boards in arch/arm/Kconfig,
plus have a second Kconfig file in board/armltd/Kconfig.
One of those three boards is actually bogus (TARGET_VEXPRESS64_AEMV8A),
that stanza looks like being forgotten in a previous cleanup.
To remove the clutter from the generic Kconfig file, just define some
ARCH_VEXPRESS64 symbol there, enable some common options, and do the
board/model specific configuration in the board/armltd Kconfig file.
That allows to streamline and fine tune the configuration later, and
to also pull a lot of "non user choices" out of the defconfigs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tom Rini [Thu, 24 Mar 2022 21:18:05 +0000 (17:18 -0400)]
Convert CONFIG_SYS_MONITOR_BASE to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_MONITOR_BASE
Note that for how this is re-used on some PowePC platforms, we introduce
CONFIG_SPL_SYS_MONITOR_BASE and CONFIG_TPL_SYS_MONITOR_BASE and use the
CONFIG_VAL macro to get the correct value at build time, in the code.
Tom Rini [Thu, 24 Mar 2022 21:18:04 +0000 (17:18 -0400)]
Convert CONFIG_NORFLASH_PS32BIT to Kconfig
This converts the following to Kconfig:
CONFIG_NORFLASH_PS32BIT
Note that we also attempt to correct the behavior of the code here,
which had been testing for "NORFLASH_PS32BIT" which would never be set,
instead check for the now set "CONFIG_NORFLASH_PS32BIT", which results
in some behavior change.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 24 Mar 2022 21:18:03 +0000 (17:18 -0400)]
at91: Switch to SD_BOOT / CONFIG_NAND_BOOT
The values CONFIG_SYS_USE_NANDFLASH and CONFIG_SYS_USE_MMC serve the
same purpose as CONFIG_SD_BOOT / CONFIG_NAND_BOOT so migrate to using
these switches instead as they're already in Kconfig.
Cc: Stelian Pop <stelian@popies.net> Cc: Heiko Schocher <hs@denx.de> Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu> Cc: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 24 Mar 2022 21:17:57 +0000 (17:17 -0400)]
M5329EVB, M5373EVB: Remove CONFIG_NANDFLASH_SIZE
In the case of M5373EVB we always had NANDFLASH_SIZE=16, so just use it
directly. In the case of M5329EVB we had not removed the rest of NAND
support when saying we didn't have NAND, so instead use that to key off
of rather than NANDFLASH_SIZE.
Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 23 Mar 2022 21:20:04 +0000 (17:20 -0400)]
global: Remove CONFIG_SYS_USE_DATAFLASH*
There are a handful of variants around CONFIG_SYS_USE_DATAFLASH and none
of them now control anything further within their board config.h files,
so remove these from CONFIG_SYS_EXTRA_OPTIONS and then remove the empty
blocks in the board config.h files. In a few places further clean up
related logic.
Tom Rini [Wed, 23 Mar 2022 21:19:57 +0000 (17:19 -0400)]
Convert CONFIG_KM_COGE5UN et al to Kconfig
This converts the following to Kconfig:
CONFIG_KM_COGE5UN
CONFIG_KM_KIRKWOOD_128M16
CONFIG_KM_KIRKWOOD
CONFIG_KM_KIRKWOOD_PCI
CONFIG_KM_NUSA
CONFIG_KM_SUSE2
Tom Rini [Wed, 23 Mar 2022 21:19:55 +0000 (17:19 -0400)]
keymile: Move sourcing of common Kconfig
The way board/keymile/Kconfig is written protects the options there from
being parsed on non-keymile platforms. We cannot however safely source
this file from multiple locations. This does not manifest as a problem
currently as there are no choice statements inside of this file (nor the
sub-Kconfig files it sources). However, moving some target selection to
one of these files exposes the underlying problem. Rework things so
that we have this file sourced in arch/Kconfig.
Tom Rini [Tue, 22 Mar 2022 01:33:32 +0000 (21:33 -0400)]
Remove CONFIG_BOARDNAME and CONFIG_BOARD_NAME
Both of these variables are used in a few hard-coded ways to set some
string values or print something to the user. In almost all cases, it's
just as useful to hard-code the value used. The exception here is
printing something closer to correct board name for p1_p2_rdb machines.
This can be done using something from the device tree, but for now
hard-code a non-CONFIG based value instead.
Tom Rini [Tue, 22 Mar 2022 01:33:29 +0000 (21:33 -0400)]
Finish converting CONFIG_BOOTM_NETBSD et al to Kconfig
This converts the following to Kconfig:
CONFIG_BOOTM_NETBSD
CONFIG_BOOTM_RTEMS
CONFIG_DESIGNWARE_WATCHDOG
CONFIG_DISPLAY_CPUINFO
CONFIG_DM_ETH
CONFIG_DM_MMC
CONFIG_DM_REGULATOR
CONFIG_DM_SPI
CONFIG_DM_SPI_FLASH
CONFIG_ISO_PARTITION
CONFIG_OF_SEPARATE
CONFIG_SPI_FLASH_WINBOND
CONFIG_SPL_ETH
CONFIG_TIMER
CONFIG_USB_DWC3
CONFIG_USB_DWC3_GADGET
CONFIG_USB_DWC3_OMAP
CONFIG_USB_DWC3_PHY_OMAP
CONFIG_USB_EHCI_TEGRA
CONFIG_USB_GADGET_DOWNLOAD
CONFIG_USB_GADGET_DUALSPEED
CONFIG_USB_GADGET_MANUFACTURER
CONFIG_USB_GADGET_PRODUCT_NUM
CONFIG_USB_GADGET_VBUS_DRAW
CONFIG_USB_GADGET_VENDOR_NUM
This catches a number of cases where board config files were #undef
various CONFIG options when building SPL, and that doesn't work. Clean
up the related comments as well.
Tom Rini [Tue, 22 Mar 2022 01:33:27 +0000 (21:33 -0400)]
am33xx: musb: Remove unused configuration logic
At this point DM and OF_CONTROL are used to configure how the USB ports
are enabled, with the exception of in SPL and no SPL_OF_CONTROL. Remove
a bunch of now unused logic to simplify the code.
Enable CONFIG_ATMEL_TCB_TIMER and disable CONFIG_ATMEL_PIT_TIMER.
This will allow using the TCB timer instead of the PIT one when running
under OP-TEE.
Clément Léger [Thu, 31 Mar 2022 08:55:09 +0000 (10:55 +0200)]
ARM: dts: at91: sama5d2: add u-boot, dm-pre-reloc property for TCB
In order to use the TCB early in boot and in the SPL, add
u-boot,dm-pre-reloc property for the TCB and the clock that is used by
the driver (tcb0_clk).
Clément Léger [Thu, 31 Mar 2022 08:55:06 +0000 (10:55 +0200)]
timer: atmel_tcb_timer: add atmel_tcb driver
Add a driver for the timer counter block that can be found on sama5d2.
This driver will be used when booting under OP-TEE since the pit timer
which is part of the SYSC is secured. Channel 1 & 2 are configured to
be chained together which allows to have a 64bits counter.
Tudor Ambarus [Fri, 25 Feb 2022 08:13:57 +0000 (10:13 +0200)]
ARM: at91: sama7g5: Reset external devices at software reset
sama7g5 and other SoCs (sama5d3, sam9x60) define in the Reset Controller
a RSTC_CR.EXTRST bit that asserts the nrst_out pin which resets external
devices.
This is particular useful for external devices that are configured in
stateful modes which can not be undone without reconfiguring the device
or without resetting the device. An example is an SPI NOR flash that is
configured in octal mode. The do_reset u-boot cmd does not call any
driver's remove method, but merely resets the CPU. As the code was, this
left the flash in octal mode, being impossible for the first stage boot
loaders to recover/identify the flash after a "software reset".
RSTC_CR.EXTRST comes in handy here, as it can be set at "software reset"
to assert low the nrst_out pin during a time defined by the RSTC_MR.ERSTL
field and reset the external devices (including the SPI NOR flash in the
example).
nrst_out is always asserted at "user reset" and it resets the external
devices correctly. Asserting nrst_out at "software reset" should behave
in a similar way. The only difference that I could find between the two
types of resets in regards to the nrst_out signal, is that at "user reset"
timing diagram the "Processor and Peripherals Reset Line" rises after six
MD_SLCK cycles after the nrst_out line rose, while at the "software reset"
timing diagram the "Processor and Peripherals Reset Line" is active for
3 MD_SLCK cycles + 2 MCK cycles. In other words, in the "software reset"
case the nrst_out signal can be active for a longer period of time than the
"Processor and Peripherals Reset Line" active time, depending on the
RSTC_MR.ERSTL value.
Using the default value (zero) for RSTC_MR.ERSTL, worked just fine for the
sama7g5 case. Tested QSPI0 and GMAC0/GMAC1 on sama7g5ek rev 4 after a
software reset with RSTC_CR.EXTRST=1 and RSTC_MR.ERSTL=0.
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