Tom Rini [Mon, 27 Apr 2020 21:50:35 +0000 (17:50 -0400)]
Merge tag 'mips-pull-2020-04-27' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- brcmnand: fix missing code path from Linux driver
- bmips: fix build error when disabling USB
- mips: add option to restore original exception vector base
- mips: fix off-by-one error when clearing gd_data
- mips: minor fixes for compatibility with generic SPL framework
- spl: refactor legacy image loading
- spl: add LZMA decompression support for legacy images
- Makefile: add target to build LZMA compressed U-Boot images
- mtmips: refactor and rewrite low-level init code
- mtmips: add and enable SPL support with LZMA
- mtmips: add support for MT7628 reference board
- mtmips: add support for VoCore/VoCore2 board
Tom Rini [Mon, 27 Apr 2020 21:50:11 +0000 (17:50 -0400)]
Merge tag 'arc-more-fixes-for-2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
Here we introduce new development platfrom for ARC: HSDK 4xD.
That's pretty much the same base-board as in HSDK but with
very recent quad-core ARC HS47D in the ASIC.
Thus we try to re-use existing code as much as possible while
inevitably add some pieces needed for the new ASIC.
Also we drop selection of bounce buffers on AXS10x
as there's no use of them any longer.
Patrick Delaunay [Wed, 22 Apr 2020 12:18:26 +0000 (14:18 +0200)]
net: tftp: remove TFTP_MTU_BLOCKSIZE
Remove the unneeded define TFTP_MTU_BLOCKSIZE.
Since the KConfig migration done by commit b618b3707633 ("net:
Convert CONFIG_TFTP_BLOCKSIZE to Kconfig"), CONFIG_TFTP_BLOCKSIZE
is always defined and can be used directly to avoid confusion
(fallback to 1468 in code is never used).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 22 Apr 2020 12:18:25 +0000 (14:18 +0200)]
net: tftp: Add help for CONFIG_TFTP_BLOCKSIZE
Add help message for the CONFIG_TFTP_BLOCKSIZE default value,
as explain in tftp.c before migration in commit b618b3707633
("net: Convert CONFIG_TFTP_BLOCKSIZE to Kconfig")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
fs: ext4: skip journal state if fs has metadata_csum
As u-boot doesn't support the metadata_csum feature, writing to a
filesystem with this feature enabled will fail, as expected. However,
during the process, a journal state check is performed, which could
result in:
- a fs recovery if the fs wasn't umounted properly
- the fs being marked dirty
Both these cases result in a superblock change, leading to a mismatch
between the superblock checksum and its contents. Therefore, Linux will
consider the filesystem heavily corrupted and will require e2fsck to be
run manually to boot.
By bypassing the journal state check, this patch ensures the superblock
won't be corrupted if the filesystem has metadata_csum feature enabled.
For non-root users mkfs.vfat is not in the search path at least on Debian.
Hence when running 'make tests' a message indicates that file system tests
have been skipped:
SKIPPED [13] test/py/tests/test_fs/conftest.py:340: Setup failed for
filesystem: fat16
This message is not really helpful as the executed program is not
indicated. Provide a more complete message like
SKIPPED [13] test/py/tests/test_fs/conftest.py:340: Setup failed for
filesystem: fat16.
Command 'mkfs.vfat -F 16 build-sandbox/persistent-data/3GB.fat16.img'
returned non-zero exit status 127.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rasmus Villemoes [Tue, 24 Mar 2020 12:57:40 +0000 (13:57 +0100)]
tools: fw_env: use erasesize from MEMGETINFO ioctl
We have a board with several revisions. The older ones use a nor flash
with 64k erase size, while the newer have a flash with 4k sectors. The
environment size is 8k.
Currently, we have to put a column containing 0x10000 (64k) in
fw_env.config in order for it to work on the older boards. But that
ends up wasting quite a lot of time on the newer boards that could
just erase the 8k occupied by the environment - strace says the 64k
erase takes 0.405 seconds. With this patch, as expected, that's about
an 8-fold better, at 0.043 seconds.
Having different fw_env.config files for the different revisions is
highly impractical, and the correct information is already available
right at our fingertips. So use the erasesize returned by the
MEMGETINFO ioctl when the fourth and fifth columns (sector size and
#sectors, respectively) are absent or contain 0, a case where the
logic previously used to use the environment size as erase size (and
consequently computed ENVSECTORS(dev) as 1).
As I'm only testing this on a NOR flash, I'm only changing the logic
for that case, though I think it should be possible for the other
types as well.
Mauro Condarelli [Tue, 18 Feb 2020 08:34:48 +0000 (09:34 +0100)]
mips: Add support for SoM "VoCore2".
Small patch to add support for VoCore/VoCore2 board.
VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.
Details about this SoM can be found at "https://vocore.io/v2.html".
Signed-off-by: Mauro Condarelli <mc5686@mclink.it> Reviewed-by: Stefan Roese <sr@denx.de>
The current implementations have some issues detecting the correct
values:
dqs_find_max() will return "last passing fieldval + 1" instead of
"last passing fieldval". Also it will return "maxval + 1" in the
case that all fieldvals are tested valid (without error).
dqs_find_min() will not test the "lowest" value because of using ">"
instead of ">=".
This patch now rewrites these functions to fix those issues. Also,
this patch uses the same approach of a for loop in both functions making
it easier to read and maintain.
Since the variables are integers now, we can use min()/max(), which
handles the wrap around case for fieldval=0: return (0 - 1).
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Stefan Roese [Fri, 6 Mar 2020 14:14:04 +0000 (15:14 +0100)]
mips: mt76x8: ddr_cal: Change types from u32 to int in dqs_find_min/max
This change is made to enable comparison of integer variables, which
might be negative in the next patch. No functional change is intended
in this patch.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Stefan Roese [Fri, 6 Mar 2020 14:14:03 +0000 (15:14 +0100)]
mips: mt76x8: ddr_cal: Rename dqs_test_valid() to dqs_test_error()
This function returns "-1" (true) upon error. So the function name does
not match its implementation which is confusing. This patch renames the
function to dqs_test_error() which makes the code easier to read.
Also change the return type to bool and return "true" or "false".
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Since SPL now uses malloc to allocate the buffer for the compressed
image before decompression to the destination address, we need to
configure a big enough malloc space in SPL. 256k seems to be big
enough even for the GARDENA board.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Weijie Gao <weijie.gao@mediatek.com>
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.
The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.
A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.
A spl loader is added to support uncompress the payload.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch rewrites the mtmips architecture with the following changes:
1. Move MT7628 soc parts into a subfolder.
2. Lock parts of D-Cache as temporary stack.
3. Reimplement DDR initialization in C language.
4. Reimplement DDR calibration in a clear logic.
5. Add full support for auto size detection for DDR1 and DDR2.
6. Use accurate CPU clock depending on the input xtal frequency for timer
and delay functions.
Note:
print_cpuinfo() has incompatible parts with MT7620 so it's moved into
mt7628 subfolder.
Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
mips: add a option to support not reserving malloc space on initial stack
The initial stack on some platforms is too small to hold a large malloc
space. This patch adds a option to allow these platforms not reserving the
malloc space on initial stack. These platforms should set the malloc base
after DRAM is usable.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
mips: add an option to support initialize SRAM for initial stack
Currently CONFIG_MIPS_INIT_STACK_IN_SRAM assumes the memory space for the
initial stack can be used directly. However on some platform the SRAM needs
initialization, e.g. lock cache.
This patch adds an option to allow a new function mips_sram_init() being
called before setup_stack_gd.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch removes this warning by changing the 'ret' variable handling.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:43 +0000 (09:28 +0200)]
spl: spl_nor: Move legacy image loading into spl_legacy.c
Move the legacy image loading into spl_legacy.c. This makes it easier
to extend the legacy image handling with new features that other
SPL loaders might use (e.g. spl_spi.c etc).
No functional change intended.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:42 +0000 (09:28 +0200)]
spl: spl_legacy: Use IS_ENABLED() to remove #ifdef
Use IS_ENABLED() instead of #ifdef CONFIG_ to remove one #ifdef.
No functional change intended.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:41 +0000 (09:28 +0200)]
spl: Extract legacy image handling into separate file
This patch moves the legacy image handling into a separate file, which
will be extended with other legacy image features later.
No function change intended.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
mips: add a mtmips-specific field to architecture-specific global data
SoCs of mtmips can use different CPU frequencies depending on the HW/SW
configurations. For example mt7628 uses 580MHz clock if the input xtal
frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot
the CPU uses the xtal frequency directly.
So hardcoding the timer frequency (half of the CPU frequency) in
CONFIG_SYS_MIPS_TIMER_FREQ is not a good idea for this case.
This patch adds a mtmips-specific field timer_freq to arch_global_data.
This field will be used later in mtmips-specific get_tbclk() to provide
accurate timer frequency in different boot stage.
Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:46 +0000 (09:28 +0200)]
mips: spl: Flush cache before jumping to U-Boot proper
This patch adds a MIPS specific jump_to_image_no_args() implementation,
which flushes the U-Boot proper image loaded from the boot device in
SPL before jumping to it.
It has been noticed on MT76x8, that this cache flush is needed. Other
MIPS platforms might need it as well.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
mips: add an option to enable u_boot_list section for SPL loaders in u-boot-spl.lds
u_boot_list is not only used by DM, but also by some SPL image load methods
such as spl_nor.c.
This patch adds an option CONFIG_SPL_LOADER_SUPPORT in conjunction with
CONFIG_SPL_DM surrounding the u_boot_list section to make sure SPL image
loaders can be correctly built into u-boot SPL without DM enabled.
Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
mips: enable support for appending dtb to spl binary
If CONFIG_SPL_OF_CONTROL is enabled for SPL and CONFIG_OF_SEPARATE is also
enabled, the dtb will be appended to the u-boot-spl.bin.
When calling dm_init_and_scan() in SPL, fdtdec_setup() will try to locate
dtb at the end of u-boot-spl.bin, by referencing to _image_binary_end.
However _image_binary_end is currently missing in u-boot-spl.lds.
This patch adds _image_binary_end to u-boot-spl.lds to make sure linking
u-boot-spl will not fail.
Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
t0 is the start address of gd, t1 is the end address of gd (t0 + GD_SIZE).
[PTR_ADDIU t0, PTRSIZE] is in the delay slot of [blt t0, t1, 1b], so it
will be executed before the branch operation.
However the comparison for the BLT instruction is done before executing the
delay slot. This means when the last word just before k1 is cleared, the
loop will continue to run once. This will clear an extra word at k1, which
is outside the global data.
Global data is placed at the top of the stack. If the initial stack is a
SRAM or locked cache, the area outside them may be inaccessible. A write
operation performed in this area may cause an exception.
To solve this, [PTR_ADDIU t0, PTRSIZE] should be placed before the BLT
instruction.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Currently, if usb is disabled the following error is produced:
CC drivers/usb/host/ohci-hcd.o
drivers/usb/host/ohci-hcd.c: In function ‘usb_lowlevel_init’:
drivers/usb/host/ohci-hcd.c:2057:35: error: ‘CONFIG_SYS_USB_OHCI_REGS_BASE’ undeclared (first use in this function); did you mean ‘CONFIG_SYS_MONITOR_BASE’?
gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CONFIG_SYS_MONITOR_BASE
drivers/usb/host/ohci-hcd.c:2057:35: note: each undeclared identifier is reported only once for each function it appears in
drivers/usb/host/ohci-hcd.c:2061:20: error: ‘CONFIG_SYS_USB_OHCI_SLOT_NAME’ undeclared (first use in this function); did you mean ‘CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS’?
gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
Linux Broadcom NAND driver only disabled clock if no childs are initialized.
This section of the code seems to have been accidentally dropped when it was
imported in U-Boot.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
ARC: HSDK-4xD: make init status resistant to U-boot reloading
Use register intstead of static variable to store HSDK init status as
we want to avoid the situation when we reload U-boot via MDB after
previous init is done but HW reset (board reset) isn't done. So
let's store the init status in unused register - CREG_CPU_0_ENTRY
so status will survive after U-boot is reloaded via MDB.
Eugeniy Paltsev [Wed, 25 Mar 2020 09:35:49 +0000 (12:35 +0300)]
ARC: HSDK-4xD: tweak memory map
For HSDK-4xD we do additional AXI bridge tweaking while doing
hsdk_init command:
- we shrink IOC region.
- we configure ARC HS CORE SLV1 aperture depending on
haps_apb_location environment variable.
Eugeniy Paltsev [Mon, 23 Mar 2020 18:50:03 +0000 (21:50 +0300)]
ARC: HSDK-4xD: add CSM configuration support
Add support for CSM enable/disable and CSM relocation via
hsdk_init command. We allow to relocate CSM to the beginning of
any aperture even if HW support finer granularity.
HSDK-4xD has other GPU type so it consumes only GPU core clock.
Even we have additional GPU clock dividers they are not routed
to anything. So drop information about those additional clocks
in hsdk_clock print_all command.
Add initial HSDK-4xD board support.
The ARC HS4x/HS4xD Development Kit includes a multicore ARC HS4xD-based
chip that integrates a wide range of interfaces including Ethernet,
HDMI, WiFi, Bluetooth, USB, SDIO, I2C, SPI, UART, I2S, ADC, PWM and
GPIO, as well as a Think Silicon GPU.
In case of DSP extension presence in HW some instructions
(related to integer multiply, multiply-accumulate, and divide
operation) executes on this DSP execution unit. So their
execution will depend on dsp configuration register (DSP_CTRL)
As we want these instructions to execute the same way regardless
of DSP presence we need to set DSP_CTRL properly.
NOTE:
we do the same adjustments in Linux kernel, see in kernel tree:
commit 4827d0cf744e ("ARC: handle DSP presence in HW")
Peter Robinson [Mon, 20 Apr 2020 18:18:25 +0000 (19:18 +0100)]
drivers: video: rockchip: fix building eDP and LVDS drivers
The rk_edp.c and rk_lvds.c files reference rk_setreg which is declared in
hardware.h so include it so the drivers build. Adjust rk_lvds.c so
includes are in alphabetical order while updating.
drivers/spi/mpc8xxx_spi.c:64:3: warning: implicit declaration of function ‘dev_err’ [-Wimplicit-function-declaration]
...
drivers/spi/built-in.o: In function `mpc8xxx_spi_set_speed':
drivers/spi/mpc8xxx_spi.c:227: undefined reference to `dev_err'
Fixes: 4856cc7a97 (mpc8xxx_spi: implement real ->set_speed) Fixes: 1a7b462dee (mpc8xxx_spi: put max_cs to use) Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d")
and required binding for S700 SoC that is a 64-bit Quad-core ARM
Cortex-A53 cores.
It also provisions dts file to be built based on selected
platform(CONFIG_MACH_S900/S700).
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Synchronize device tree bindings with v5.5-rc6 tag with commit id
"b3a987b0264d".
Also, it removes older clock binding defined for S900 along with undocumented
compatible string "actions,s900-serial" from serial driver and adapts clock
driver to cater to new bindings.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
b42841b7bb62 kbuild: Get rid of KBUILD_STR 2aedcd098a94 kbuild: suppress annoying "... is up to date." message 9c8fa9bc08f6 kbuild: fix if_change and friends to consider argument order ebf003f0cfb3 kbuild: Consolidate header generation from ASM offset information 2982c953570b kbuild: remove redundant $(wildcard ...) for cmd_files calculation 8a78756eb545 kbuild: create object directories simpler and faster 4d4b5c2e3b6e treewide: remove explicit rules for *offsets.s 01d509a48b46 kbuild: remove unimportant comments from ./Kbuild
Patrick Delaunay [Fri, 10 Apr 2020 14:34:41 +0000 (16:34 +0200)]
README: remove references on no more used config CONFIG_SYS_RCAR_I2C*
Remove the references in README on CONFIG_SYS_RCAR_I2C_* not use
in U-Boot drivers/i2c/rcar_i2c.c, since commit a4d9aafadb31 ("i2c:
rcar_i2c: Remove the driver") and commit a06a0ac36d59 ("i2c: rcar_i2c:
Add DM and DT capable I2C driver")
Checked by the command: grep -r SYS_RCAR_I2C *
And these CONFIG are only defined in
arch/arm/mach-rmobile/include/mach/rcar-base.h
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 8 Apr 2020 08:09:16 +0000 (10:09 +0200)]
lib: strto: Stop detection when invalid char is used
This issue has been found when mtd partition are specified. Autodetection
code should stop when the first invalid char is found.
Here is the example of commands:
setenv mtdids nand0=memory-controller@e000e000
setenv mtdparts "mtdparts=nand0:4m(boot),4m(env),64m(kernel),96m(rootfs)"
mtd list
mtd: nand: pxa3xx: fix raw read when last_chunk_size == 0
Commit 6293b0361d9 ("mtd: nand: pxa3xx: add raw read support") added the
local data_len variable in handle_data_pio() to track read size, but
forgot to update the condition of drain_fifo() call. That happens to
work when the layout last_chunk_size != 0. But when last_chunk_size ==
0, drain_fifo() is not called to read the last chunk, which leads to
"Wait timeout!!!" error. Fix this.
Ovidiu Panait [Sun, 29 Mar 2020 17:57:40 +0000 (20:57 +0300)]
arm: asm/cache.c: Introduce arm_reserve_mmu
As a preparation for turning reserve_mmu into an arch-specific variant,
introduce arm_reserve_mmu on ARM. It implements the default routine for
reserving memory for MMU TLB and needs to be weakly defined in order to allow
for machines to override it.
Without this decoupling, after introducing arch_reserve_mmu, there would be two
weak definitions for it, one in common/board_f.c and one in
arch/arm/lib/cache.c.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>