board: traverse: ten64: init nvme devices in late boot to ensure bootflow availability
Ensure nvme devices are scanned before reaching the shell,
otherwise extra user intervention ("nvme scan") is required
before they are visible to bootdev/bootflow.
Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com>
board: traverse: ten64: add NAND based OpenWrt bootcmd
The default Ten64 MTD configuration reserves two ubifs partitions
for OpenWrt residing on NAND flash. Add the bootcmd for this system
into the default environment.
Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com>
board: traverse: ten64: update DPAA2 (network) binary path on sdcards
Change the firmware on microSD path to "firmware/traverse/ten64"
as per EBBR section 4.2[1].
The Traverse firmware tools now locate the DPAA2 firmware
and configuration files under that path on the rescue
SD card image.
If a user then installs a standard Linux
distribution over the top of that sdcard, (in theory)
it will be left alone by distribution boot tooling.
The DPAA2 DPL (data plane layout) file was previously
being loaded into 0x80300000, and set to be applied
just before hand off to the kernel.
When a FIT image with a load_address of 0x80000000 was
booted with bootm, the DPL in memory was overwritten.
Move the DPL load to 0x8E000000 (196MiB away from 0x80000000,
and below the other typical load addr of 0x90000000).
Ideally in the future, the DPL lazyapply command
("fsl_mc lazyapply DPL $dpl_addr") should be set to
load the DPL contents into a memory area owned by U-Boot.
Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com>
board: traverse: ten64: ensure retimer reset is done on new board revisions
Board revision C (production) and later require the SFP+
retimer to be turned on (or reset) on boot, by way of issuing
a command to the board's microcontroller (via I2C).
The comparison statement here was incorrect, as the board
ID decrements every revision (from 0xFF downwards),
so this was matching board RevA,B,C instead of Rev >= C.
Another oops that transpired when working on this issue,
is that if the board controller is not called (such as
CONFIG_TEN64_CONTROLLER=n or earlier board rev), then
the retimer udevice was not obtained. So the board
version check has to be moved inside board_cycle_retimer
(which probes/fetches the retimer device) as well.
board: traverse: ten64: recognize board revision D
Ten64 board revision D is a variant that removes the USB hub
and PCIe expander/switch, but is otherwise compatible with the
main production "C" version.
At the same time, revise the printf specifiers (PCB version
"1064-0201%s") to reduce the number of string characters related
to the boot printout.
Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch adds general board files based on MT7988 SoCs.
MT7988 uses one mmc controller for booting from both SD and eMMC,
and the pins of mmc controller booting from SD are also shared with
one of spi controllers.
So two configs are need for these boot types:
1. mt7988_rfb_defconfig - SPI-NOR, SPI-NAND and eMMC
2. mt7988_sd_rfb_defconfig - SPI-NAND and SD
tools: mtk_image: use uint32_t for ghf header magic and version
This patch converts magic and version fields of ghf common header
to one field with the type of uint32_t to make this header flexible
for futher updates.
arm: dts: medaitek: convert gmac link mode to 2500base-x
Now that individual 2.5Gbps SGMII support has been added to
mtk-eth, all boards that use 2.5Gbps link with mt7531 must be
converted to use "2500base-x" instead of "sgmii".
net: mediatek: fix direct MDIO clause 45 access via SoC
The original direct MDIO clause 45 access via SoC is missing the
data output. This patch adds it back to ensure MDIO clause 45 can
work properly for external PHYs.
net: mediatek: connect switch to PSE only when starting eth is requested
So far the switch is initialized in probe stage and is connected to PSE
unconditionally. This will cause all packets being flooded to PSE and may
cause PSE hang before entering linux.
This patch changes the connection between switch and PSE:
- Still initialize switch in probe stage, but disconnect it with PSE
- Connect switch with PSE on eth start
- Disconnect on eth stop
pinctrl: mediatek: fix the return value in driving configuration functions
The original mediatek pinctrl functions for driving configuration
'mtk_pinconf_drive_set_*' do not return -ENOSUPP even if input
parameters are not supported.
This patch fixes the return value in those functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
pinctrl: mediatek: convert most definitions to const
There exists a situation of the mediatek pinctrl driver that may return
wrong pin function value for the pinmux driver:
- All pin function arrays are defined without const
- Some pin function arrays contain all-zero value, e.g.:
static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, };
- These arrays will be put into .bss section during compilation
- .bss section has no "a" attribute and does not exist in the final binary
file after objcopy.
- FDT binary blob is appended to the u-boot binary, which occupies the
.bss section.
- During board_f stage, .bss has not been initialized, and contains the
data of FDT, which is not full-zero data.
- pinctrl driver is initialized in board_f stage, and it will get wrong
data if another driver is going to set default pinctrl.
Since pinmux information and soc data are only meant to be read-only, thus
should be declared as const. This will force all pinctrl data being put
into .rodata section. Since .rodata has "a" attribute, even the all-zero
data will be allocated and filled with correct value in to u-boot binary.
In u-boot we don't use IRQ. Instead, we poll busy bit in SPI_STATUS.
However these IRQ enable bits may be set in previous boot stage (BootROM).
If we leave these bits not cleared, although u-boot has disabled IRQ and
nothing will happen, the linux kernel may encounter panic during
initializing the spim driver due to IRQ event happens before IRQ handler
is properly setup.
This patch clear IRQ bits to prevent this from happening.
Simon Glass [Sun, 23 Jul 2023 03:43:57 +0000 (21:43 -0600)]
binman: Support templates containing phandles
This provides support for phandles to be copied over from templates. This
is not quite safe, since if the template is instantiated twice (i.e. in
two different nodes), then duplicate phandles will be found. This will
result in an error.
Simon Glass [Sun, 23 Jul 2023 03:43:53 +0000 (21:43 -0600)]
dtoc: Make properties dirty when purging them
Without the 'dirty' flag properties are not written back to the
devicetree when synced. This means that new properties copied over to a
node are not always written out.
Jonas Karlman [Tue, 18 Jul 2023 20:34:40 +0000 (20:34 +0000)]
Makefile: Show binman missing blob message
When binman is invoked during a build of U-Boot and an external blob is
missing, the user is usually presented with a generic file not found in
input path message.
Invoke binman with --allow-missing so that binman can show relevant
missing blob help messages. Build continue to fail with missing blobs
unless BINMAN_ALLOW_MISSING=1 is used, same as before.
This changes the following error message during a normal build:
binman: Filename 'atf-bl31' not found in input path (...)
to the following:
Image 'itb' is missing external blobs and is non-functional: atf-blob
/binman/itb/fit/images/atf/atf-blob (bl31.bin):
See the documentation for your board. You may need to build ARM Trusted
Firmware and build with BL31=/path/to/bl31.bin
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Tue, 18 Jul 2023 20:34:39 +0000 (20:34 +0000)]
binman: Show filename in missing blob help message
Show the filename next to the node path in missing blob help messages,
also show a generic missing blob message when there was no help message
for the help tag.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Tue, 18 Jul 2023 20:34:37 +0000 (20:34 +0000)]
binman: Fix blank line usage for invalid images warning text
There is no blank line between last missing blob help message and the
header line for optional blob help messages.
Image 'simple-bin' is missing external blobs and is non-functional: atf-bl31
/binman/simple-bin/fit/images/@atf-SEQ/atf-bl31:
See the documentation for your board. You may need to build ARM Trusted
Firmware and build with BL31=/path/to/bl31.bin
Image 'simple-bin' is missing external blobs but is still functional: tee-os
/binman/simple-bin/fit/images/@tee-SEQ/tee-os:
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin
Some images are invalid
With this a blank line is inserted to make the text more readable.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Tue, 18 Jul 2023 20:34:36 +0000 (20:34 +0000)]
binman: Override CheckOptional in fit entry
Missing optional blobs was not reported for generated entries, e.g.
tee-os on rockchip targets. Implement a CheckOptional to fix this.
After this the following can be shown:
Image 'simple-bin' is missing optional external blobs but is still functional: tee-os
/binman/simple-bin/fit/images/@tee-SEQ/tee-os (tee-os):
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Tue, 18 Jul 2023 20:34:35 +0000 (20:34 +0000)]
binman: Report missing external blobs using error level
Print missing external blobs using error level and missing optional
external blobs using warning level. Also change to only print the header
line in color, red for missing and yellow for optional.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org>
+ Fix compilation error for CI when enabling RTL8169 driver
+ Fix compilation error for pci_mmc.c by adding acpi_table header file
+ Support video console and usb keyboard on RISC-V QEMU virt machine
+ Support StarFive JH7110 PCIe driver
+ Enable PCI on Unmatched board
binman: elf: Check for ELF_TOOLS availability and remove extra semicolon
Check if elf tools are available when running DecodeElf(). Also
remove superfuous semicolon at line ending.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Revert part of patch to make binman test pass Signed-off-by: Simon Glass <sjg@chromium.org>
Commit 66ffe57 ("riscv: qemu: detect and boot the kernel passed by QEMU")
added some logic to handle "riscv,kernel-start" in DT and stored the
address to an environment variable kernel_start.
However this "riscv,kernel-start" has never been an upstream DT binding.
The upstream QEMU never generates such a DT either. Presumably U-Boot
development was based on a downstream QEMU fork.
Now we drop all codes in commit 66ffe57, except that BOARD_LATE_INIT
is kept for later use.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 23 Jul 2023 04:40:38 +0000 (12:40 +0800)]
riscv: qemu: Enable PRE_CONSOLE_BUFFER
By default the video console only outputs messages after it's ready.
Messages before that won't show on the video console, but U-Boot has
an option to buffer the console messages before it's ready.
Enable this support, and carefully select an address for the buffer.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 23 Jul 2023 04:40:37 +0000 (12:40 +0800)]
console: Print out complete stdio device list
At present if both CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are on,
during boot, the printed out stdio devices are incomplete, e.g.:
with "stdout=serial,vidconsole", only "vidconsole" is printed.
For such case, we can print out the stdio device name from the
environment variables.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h. This file does not exist for the RISC-V architecture
and thus code compilation fails when using this driver on RISC-V
Create an empty include file.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
The Unmatched board is typically booted from NVMe which requires PCI.
When dropping to a console PCI is not initialized yet. 'pci enum' has to be
called.
Change the configuration to call pci_init() in board_init_r().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Rick Chen <rick@andestech.com>
net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V
For RISC-V architeture, hardware maintain the dcache coherency.
Software do not flush the cache. So even cache-line size larger
than descriptor size, driver can work.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
i2c: designware: Add Kconfig for designware_i2c_pci.c
As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
JH7110) contain Designware i2c and PCI but do not use ACPI,
This file cannot be compiled. So add a new Kconfig for
designware_i2c_pci.c, which depends on ACPIGEN
Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tom Rini [Tue, 1 Aug 2023 14:17:49 +0000 (10:17 -0400)]
Merge tag 'video-20230801' of https://source.denx.de/u-boot/custodians/u-boot-video
- dm video cosmetic style fix
- bochs: remove the x86 limitation
- correct kconfig text for PCI default FB size
- kconfig: drop the superfluous PCI dependency
- set up default FB size for Bochs
drivers: video: tidss: tidss_drv: Use kconfig VIDEO_REMOVE to remove video
Perform removal of DSS if kconfigs VIDEO_REMOVE or SPL_VIDEO_REMOVE is
set by user. Otherwise if above Kconfigs are not selected, it is assumed
that user wants splash screen to be displayed until linux kernel boots
up. In such scenario, leave the power domain of DSS as "on" so that
splash screen stays intact until kernel boots up.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Change remove method of DSS video driver to disable video port instead
of performing a soft reset, as soft reset takes longer duration. Video
port is disabled by setting enable bit of video port to 0.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Bin Meng [Sun, 23 Jul 2023 04:40:31 +0000 (12:40 +0800)]
video: kconfig: Set default FB size for Bochs
Set up a default frame buffer size of 8MiB for Bochs for non-x86
architecturs as PCI is normally not enumerated before relocation
on these architectures.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 23 Jul 2023 04:40:29 +0000 (12:40 +0800)]
video: kconfig: Fix wrong text for the PCI default FB size
There is an example in the VIDEO_PCI_DEFAULT_FB_SIZE help text to
tell people how to calculate its value but the resolution given
does not match the value. Fix it.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sun, 23 Jul 2023 04:40:27 +0000 (12:40 +0800)]
video: bochs: Avoid using IO instructions to access VGA IO port
At present the driver uses IO instructions to access the legacy
VGA IO ports, which unfortunately limits the driver to work only
on x86. It turns out the IO instruction is not necessary as Bochs
VGA card remaps the legacy VGA IO ports (0x3c0 -> 0x3df) to its
memory mapped register space from offset 0x400.
Update the driver to use MMIO access for VGA IO port.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # qemu-x86_64
Simon Glass [Mon, 31 Jul 2023 06:01:08 +0000 (14:01 +0800)]
x86: Return mtrr_add_request() to its old purpose
This function used to be for adding a list of requests to be actioned on
relocation. Revert it back to this purpose, to avoid problems with boards
which need control of their MTRRs (i.e. those which don't use FSP).
The mtrr_set_next_var() function is available when the next free
variable-MTRR must be set, so this can be used instead.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Fixes: 3bcd6cf89ef ("x86: mtrr: Skip MSRs that were already programmed..") Fixes: 596bd0589ad ("x86: mtrr: Do not clear the unused ones..") Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Mon, 31 Jul 2023 06:01:07 +0000 (14:01 +0800)]
video: vesa: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 31 Jul 2023 06:01:06 +0000 (14:01 +0800)]
video: ivybridge: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 31 Jul 2023 06:01:05 +0000 (14:01 +0800)]
video: broadwell: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 31 Jul 2023 06:01:04 +0000 (14:01 +0800)]
x86: fsp: Use mtrr_set_next_var() for graphics memory
At present this uses mtrr_add_request() & mtrr_commit() combination
to program the MTRR for graphics memory. This usage has two major
issues as below:
- mtrr_commit() will re-initialize all MTRR registers from index 0,
using the settings previously added by mtrr_add_request() and saved
in gd->arch.mtrr_req[], which won't cause any issue but is unnecessary
- The way such combination works is based on the assumption that U-Boot
has full control with MTRR programming (e.g.: U-Boot without any blob
that does all low-level initialization on its own, or using FSP2 which
does not touch MTRR), but this is not the case with FSP. FSP programs
some MTRRs during its execution but U-Boot does not have the settings
saved in gd->arch.mtrr_req[] and when doing mtrr_commit() it will
corrupt what was already programmed previously.
Correct this to use mtrr_set_next_var() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 31 Jul 2023 13:56:02 +0000 (07:56 -0600)]
x86: Change testing logic of mtrr commit
On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper
needs to program MTRRs too. With current testing logic of mtrr
commit in init_cache_f_r(), the mtrr commit is skipped which won't
work as the queued mtrr requests include setup for DRAM regions.
Change the logic to allow such configuration.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tweak to put back CONFIG_FSP_VERSION2 at top: Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 31 Jul 2023 15:31:26 +0000 (11:31 -0400)]
Merge tag 'u-boot-rockchip-20230731' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Update dwc3 generic driver and update support for rk3568/rk3328;
- Add boards:
rk3566: Pine64 Quartz64-A/B, SOQuartz on Model A/Blade/CM4-IO
rk3568: Radxa E25 Carrier Board
rk3588: Radxa ROCK5A
- Fixes and updates for chromebook veryon/jerry/speedy;
- SPI support fixes for rk3399/rk3568/rk3588;
- rk3588 usbdp phy support;
- dts and config updates for different boards;
Jonas Karlman [Sun, 30 Jul 2023 12:30:26 +0000 (12:30 +0000)]
board: rockchip: Add Radxa E25 Carrier Board
Radxa E25 is a network application carrier board for the Radxa CM3I SoM
with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key,
USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header.
Features tested on a Radxa E25 v1.4:
- SD-card boot
- eMMC boot
- USB host
- PCIe/Ethernet adapters is detected
- SATA
Jagan Teki [Tue, 6 Jun 2023 17:09:18 +0000 (22:39 +0530)]
configs: rockchip: Enable USB2PHY for RK3328 boards
Enable USB2PHY for all RK3328 boards.
=> usb start
starting USB...
Bus usb@ff5c0000: USB EHCI 1.00
Bus usb@ff5d0000: USB OHCI 1.0
Bus usb@ff600000: generic_phy_get_bulk : no phys property
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@ff580000: USB DWC2
scanning bus usb@ff5c0000 for devices... 2 USB Device(s) found
scanning bus usb@ff5d0000 for devices... 1 USB Device(s) found
scanning bus usb@ff600000 for devices... 2 USB Device(s) found
scanning bus usb@ff580000 for devices... 2 USB Device(s) found
scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
|
+-2 Mass Storage (480 Mb/s, 500mA)
TS-RDF5A Transcend 000000000009
Jagan Teki [Tue, 6 Jun 2023 17:09:17 +0000 (22:39 +0530)]
clk: rockchip: rk3328: Handle usb480m phy clock
Handle USB480M clock ID in set_rate() and set_parent()
to allow the dt assigned-clocks and assigned-clock-parents
work on rk3328.dtsi
Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
projects / u-boot.git / log