Simon Glass [Sun, 10 May 2020 20:17:02 +0000 (14:17 -0600)]
bdinfo: x86: vesa: Update fb_base to the correct value
Set this value in global_data so that it is reported correctly on x86
boards.
In fact, U-Boot allocates space for the frame buffer even though it is not
used. Then the FSP picks the address itself (e.g. 0xb0000000). So the
value set by U-Boot (high in memory with everything else that is
relocated), is not actually the correct value.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 May 2020 20:17:01 +0000 (14:17 -0600)]
bdinfo: dm: Update fb_base when using driver model
Update this value with the address of a video device so that it shows with
the 'bd' command.
It would be better to obtain the address from the uclass by looking in
struct video_uc_platdata for each device. We can move over to that once
DM_VIDEO migration is complete.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 May 2020 20:16:59 +0000 (14:16 -0600)]
bdinfo: m68k: ppc: Move arch-specific code from bdinfo
We don't have an easy way to share these three lines of code with two
architectures. We also want to make it clear that this code is actually
arch-specific.
So just duplicate it in each arch-specific file.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Sun, 10 May 2020 20:16:55 +0000 (14:16 -0600)]
bdinfo: Export some basic printing functions
At present the functions to print a number and a frequency are static. We
want to move some of the code in here to an arch-specific file. For
consistency that code should use these same functions. So export them with
an appropriate name.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 May 2020 20:16:53 +0000 (14:16 -0600)]
bdinfo: net: Drop legacy ethernet bdinfo
This code pre-dates driver model and the migration date is nearly upon us.
Pare the print_eths() function down and enable it for driver model, since
it works correctly.
The IP address is already printed in print_eth_ip_addr() so we can remove
that.
Since this results in a one-line print_eths() function, inline it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 May 2020 20:16:52 +0000 (14:16 -0600)]
bdinfo: net: ppc: Drop prints for CONFIG_HAS_ETHn
These config options have not been migrated to Kconfig. This should be
handled using driver model, iterating over the available Ethernet devices.
For now, remove the code.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Sun, 10 May 2020 20:16:46 +0000 (14:16 -0600)]
bdinfo: ppc: Drop arch-specific print_baudrate()
This function outputs the same basic info. Since the baud rate is commonly
115200 these is often no difference. Drop the arch-specific code and
inline it to avoid a one-line function.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Simon Glass [Sun, 10 May 2020 20:16:41 +0000 (14:16 -0600)]
bdinfo: Drop the option to not use the generic 'bd' command
Now that all architectures are using the generic do_bdinfo(), drop the
option to not use it. When new architectures are added, they will get at
least some useful information from the generic implementation.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 May 2020 20:16:33 +0000 (14:16 -0600)]
bdinfo: x86: Use the generic bd command
This arch shows 'ethspeed' info but only the freescale drivers use it, so
it can be dropped.
It also calls print_bi_dram() which is safe to call from any arch since it
has an #ifdef inside it. Add this to the generic do_bdinfo() and move x86
over to use it. Put it first since pytests rely on seeing it before
memstart in find_ram_base().
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 May 2020 20:16:29 +0000 (14:16 -0600)]
bdinfo: mips: Use the generic bd command
MIPS currently has a few extra things which are generally useful. Add them
to the generic function and move MIPS over to use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Simon Glass [Sun, 10 May 2020 20:16:28 +0000 (14:16 -0600)]
bdinfo: xtensa: Create a generic do_bdinfo for xtensa
This arch uses only the generic function. It would be nice if all the
archs did the same. As a first step, create a new generic function for the
'bd' command and make xtensa use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Thu, 25 Jun 2020 13:33:39 +0000 (09:33 -0400)]
Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2020.10
Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default
ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform
Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board
mmc:
- minor GD pointer removal
net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver
spi:
- Cleanup global macros for xilinx spi drivers
firmware:
- Add support for pmufw reloading
fpga:
- Improve error status reporting
common:
- Remove 4kB addition space for FDT allocation
common: fdt: Remove additional 4k space for fdt allocation
There is no technical reason to add additional 4k space for FDT. This space
is completely unused and just increase memory requirements. This is
problematic on systems with limited memory resources as Xilinx Zynq
CSE/ZynqMP mini and Versal mini configurations.
The patch is removing additional 4k space.
EFI code is using copy_fdt() which copy FDT to different location.
And all boot commands in case of using U-Boot's FDT pointed by
$fdtcontroladdr are copying FDT to different locations by
image_setup_libfdt().
That's why in proper flow none should modified DTB used by U-Boot that's
why there is no need for additional space.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Stephen Warren <swarren@nvidia.com>
Michal Simek [Mon, 27 Apr 2020 09:26:31 +0000 (11:26 +0200)]
xilinx: zynqmp: Enable pmufw config reloading
PMU FW has functionality to accept and reload configuration object at run
time. The patch is adding support for doing it via u-boot prompt.
For example:
tftpboot 100000 pmu_obj.bin
zynqmp pmufw 100000 $filesize
The most of pmufw configurations don't allow config reloading.
Also official Xilinx PMUFW doens't support this feature properly but the
patch should open a way to call PMUFW with this request.
Here is example of PMUFW config fragment which enables config reloading.
/* SET CONFIG SECTION */
PM_CONFIG_SET_CONFIG_SECTION_ID, /* Section ID */
PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Thu, 6 Jun 2019 07:47:41 +0000 (09:47 +0200)]
topic: zynqmp: Add support for zynqmp-xilinx-xdp platform
XDP - Xilinx Drone Platform is a board for drones or other UAV.
Pinmux the SD card by default, and if the SD card detect line is high
(inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on
extension card and shares connection with on board wife. That means that
when SD card is present in the board wifi can't be used.
There seems to be an issue with DDR access from PL at 2400MT/s, after
updating the PMU and ATF firmware this is causing extremely slow DDR
access. Reducing the DDR speed from 2400 to 2133 appears to solve that
issue, even though the hardware has proven to be 2400 capable.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Fri, 18 Oct 2019 05:34:13 +0000 (07:34 +0200)]
board: zynqmp: Fix for wrong AMS setting by ROM
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register
at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to
exchange the PS supply voltages 0 and 1. On Xilinx boards this is
not noticeable since these are tied together, it's only really
noticeable if banks 500 and 501 have different supplies. Xilinx' tech
support reported this undocumented register to be the cause, and
this patch applies a fix for all boards by programming the correct
value.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Wed, 22 Apr 2020 14:27:19 +0000 (16:27 +0200)]
board: topic-miami: Set FCLK1 to 150MHz
In all reference designs the FCLK1 runs at 150MHz, but the bootloader
doesn't set it up like that. Set the divider to 8 to generate the
correct clock. Fixes (a.o.) the DMA speed being too slow.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
net: xilinx: axi_emac: Fix endless loop when no PHYs are connected
The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.
Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove below config options and convert them to macros. They have never
been configured to different values than default one. And also it makes
sense to reduce the config_whitelist.
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_XILINX_SPI_IDLE_VAL
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 May 2020 14:05:01 +0000 (08:05 -0600)]
net: gem: Disable PCS autonegotiation in case of fixed-link
Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.
Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 27 Apr 2020 09:51:40 +0000 (11:51 +0200)]
firmware: zynqmp: Change panic logic in zynqmp_pmufw_load_config_object()
There is no need to panic all the time when pmufw config object loading
failed. The patch improves function logic to report permission deny case
and also panic only for SPL case.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Rajan Vaja [Tue, 5 May 2020 05:53:56 +0000 (22:53 -0700)]
clk: versal: Remove alt_ref_clk from clock sources
alt_ref_clk is applicable only for PS extended version.
For PS base version there is no separate alt_ref_clk.
It is tied with ref_clk, so remove it from driver.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 5 May 2020 14:17:57 +0000 (16:17 +0200)]
arm64: versal: Let U-Boot to update memory node by default
There is no reason not to let U-Boot to update memory node by default. In
past this was disabled by purpose to be able to test different memory
configurations from one U-Boot instance.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Walter Lozano [Tue, 19 May 2020 18:24:22 +0000 (15:24 -0300)]
mx6cuboxi: customize board_boot_order to access eMMC
In SPL legacy code only one MMC device is created, based on BOOT_CFG
register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are created
based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.
This patch customizes board_boot_order taking into account BOOT_CFG
register to point to correct MMC1 / MMC2 device. Additionally, handle
IO mux for the desired boot device.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>