am33xx: add ELM support

AM33XX has Error Location Module (ELM) that can be used in conjuction
with GPMC controller to implement BCH codes fully in hardware.
This code is mostly taken from arago tree.

Signed-off-by: Mansoor Ahamed <mansoor.ahamed@ti.com>
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

am335x_evm: enable NAND support

Enable NAND support for AM335X boards.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

am33xx: NAND support

TI AM33XX has the same GPMC controller as OMAP3 so we could just use the
existing omap_gpmc driver. This patch adds adds required
definitions/intialization.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

am335x_evm: add nand pinmux definition

Add NAND pins mux settings for AM335X devices. Enable NAND pins
for AM335X EVM board.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

OMAP: include sys_proto.h from boot-common

Include asm/arch/sys_proto.h for gpmc_init prototype.
Without this we get a warning while building for AM335x.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

omap3/mem.c: remove unused defines

These GPMC_CS defines are a leftover from prior gpmc_init(). Commit 187af954
removed the need for these definitions but missed to remove them.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

mx28: Fix typo in POWER_DCLIMITS_NEGLIMIT_OFFSET

The POWER_DCLIMITS_NEGLIMIT_OFFSET bit in mx28 power supply block is
not called POWER_DCLIMITS_NETLIMIT_OFFSET, but POWER_DCLIMITS_NEGLIMIT_OFFSET.
Correct the name in the header file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

mx28: Fix typo in POWER_MINPWR_VBG_OFF

The POWER_MINPWR_VBG_OFF bit in mx28 power supply block is not called
POWER_MINPWR_FBG_OFF, but POWER_MINPWR_VBG_OFF. Correct the name in the
header file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

tegra: use generic fs commands in BOOTCOMMAND

Modify tegra-common-post.h's BOOTCOMMAND definition to use the generic
filesystem command load rather than separate fatload and ext2load.
This removes the need to iterate over supported filesystem types in the
boot command.

This requires editing all board config headers to enable the new
commands. The now-unused commands are left enabled to assue backwards
compatibility with any user scripts. Boards (all from Avionic Design)
which define custom BOOTCOMMAND values are not affected.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
tegra generic fs cmds fixup
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: config: seaboard: Move tegra-common-post to correct place

The NAND defines ended up before this include file, but should be after
it, so it doesn't become a post-pre-NAND.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Remove unnecessary CONFIG_SYS_NAND_BASE

Now that we are using the new CONFIG_SYS_NAND_SELF_INIT setup, we don't
need CONFIG_SYS_NAND_BASE. Punt it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

ARM: tegra: enable 8-bit SD slots in board files

Harmony contains an SD slot with all 8 bits routed. This allows plugging
in an eMMC-chip-in-SD-form-factor.

Seaboard/Springbank/Ventana/AC100 all have an eMMC chip with all 8 bits
hooked up.

Now that the U-Boot eMMC code fully supports 8-bit operation, initialize
those ports as 8-bit instead of 4-bit to improve performance.

Whistler was already registering its ports as 8-bit.

TrimSlice doesn't have any 8-bit ports.

I don't have any Avionic Design boards nor the Colibri board to test with.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

mmc: tegra: support 4-bit operation too on 8-bit slots

If a board has all 8 data lines routed, the SD/MMC controller can still
operate in 4-bit (or presumably even 1-bit) mode. Adjust Tegra's MMC
driver to report the 4-bit capability even for 8-bit slots.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: add CONSOLE_MUX support to tegra-kbc

Add support for CONSOLE_MUX to tegra-kbc driver.  This requires
adding a flag to struct keyb to know the driver has already been
initialized so if we try to initialize it again we can just return
success.  Also call into iomux_doenv() from drv_keyboard_init to
re-evaluate the stdin string.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

ARM: tegra: TrimSlice: add support for USB1 port

TrimSlice's USB1 port has two purposes; it either acts as a device port
hosting Tegra's USB recovery protocol, or acts as a host port connected
to the internal USB->SATA bridge chip, which may in turn be connected to
an SSD or HDD. Add the appropriate device tree and board configuration
options to enable this port as a host port, and route the port to the
SATA bridge using the VBUS GPIO.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Enable display/lcd support on Seaboard

Enable the Seaboard's 16-bit LCD and use it as the console.

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

lcd: Add CONFIG_CONSOLE_SCROLL_LINES option to speed console

When the cursor position gets to the end of the LCD console we normally
scroll by one line. This adds an option to increase that value.

Console scrolling is often slow, and if a large amount of output is
being sent, increasing this option to 10 or so will speed things up
considerably.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: fdt: Add LCD definitions for Seaboard

The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
by one of the PWMs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Support control of cache settings for LCD

Add support for selecting the required cache mode for the LCD:
off, write-through or write-back.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Align LCD frame buffer to section boundary

For tegra we want to enable the cache for the LCD. This is easier if
we can avoid using L2 page tages, so align the LCD to a section
boundary.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

lcd: Add support for flushing LCD fb from dcache after update

This provides an option for the LCD to flush the dcache after each update
(puts, scroll or clear).

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignment

The normal alignment is PAGE_SIZE, but if this is defined, we can support
other alignments.

The motivation for this change is to make the display section-aligned on
ARM so that we can easily turn off data caching for the frame buffer region
without resorting to level 2 page tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

arm: Add control over cachability of memory regions

Add support for adjusting the L1 cache behavior by updating the MMU
configuration. The mmu_set_region_dcache_behaviour() function allows
drivers to make these changes after the MMU is set up.

It is implemented only for ARMv7 at present.

This is needed for LCD support, where we want to make the LCD frame buffer
write-through (or off) rather than write-back.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Add LCD support to Nvidia boards

Add calls to the LCD driver from Nvidia board code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Add LCD driver

This driver supports driving a single LCD and providing a U-Boot console
on it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Add SOC support for display/lcd

Add support for the LCD peripheral at the Tegra2 SOC level. A separate
LCD driver will use this functionality to configure the display.

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Mayuresh Kulkarni:
- changes to remove bitfields and clean up for submission

Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass:
- simplify code, move clock control into here, clean-up
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Add support for PWM

The pulse width/frequency modulation peripheral supports generating
a repeating pulse. It is useful for controlling LCD brightness.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: fdt: Add LCD definitions for Tegra

Add LCD definitions and also a proposed binding for LCD displays.

The PWM is as per what will likely be committed to linux-next soon.

The displaymode binding comes from a proposal here:

http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html

The panel binding is new, and fills a need to specify the panel
timings and other tegra-specific information. Should a binding appear
that allows the pwm to handle this automatically, we can revisit
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: fdt: Add pwm binding and node

This binding will apparently soon be in linux-next. Bring it in now
since we need to do something, and may as well try to target what
Linux will have.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Add display support to funcmux

Add support for a default pin mapping for display1.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Use const for pinmux_config_pingroup/table()

These two functions don't actually modify their arguments so add a const
keyword.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

pxa: Disable dcache on palmld, palmtc, zipitz2

These platforms don't include dcache support. Define CONFIG_SYS_DCACHE_OFF
so that functions don't try to call non-existent routines like
flush_dcache_range().

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

mx5: Mark lowlevel_init board-specific code

The mx5 lowlevel_init.S contains board-specific code based on the reference
design. Let's keep it since it avoids creating new lowlevel_init files and it
may be used by many boards. But add a config to make it optional in order not to
cause issues on boards not following this part of the reference design.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>

ehci-mxc: Fix host power mask bit for i.MX25

The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.

This issue has been reported by Eric Bénard <eric@eukrea.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>

mx35pdk: Configure CONFIG_BOOTDELAY to one second

One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

mx31pdk: Configure CONFIG_BOOTDELAY to one second

One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

mx25pdk: Configure CONFIG_BOOTDELAY to one second

One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

mx51evk: Configure CONFIG_BOOTDELAY to one second

One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

mx6qsabre_common: Configure CONFIG_BOOTDELAY to one second

One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>

mx6qsabrelite: Configure CONFIG_BOOTDELAY to one second

One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>

mx53loco: Configure CONFIG_BOOTDELAY to one second

One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

mx28evk: Configure CONFIG_BOOTDELAY to one second

One second is enough time for users to react in case they want to stop the
booting process.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

ehci-mxc: Fix host power mask bit for i.MX35

The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.

This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>

mx6: clock: Only show CSPI clock if CSPI is enabled

If a board does not enable CSPI, there is no need to show the CSPI clock
frequency as part of the 'clock' command.

Reported-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>

spi: mxc_spi: Fix spi clock glitch durant reset

Measuring the spi clock line on a scope shows a 'glitch' during the reset of the
spi.

Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes
always stable.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

spi: mxc_spi: Fix handling of chip select

In decode_cs() function the polarity of the chip select must be taken into
account.

Also, for the case of low active chip select, the CS was activated too early.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

mx5: Print CSPI clock in 'clock' command

Print CSPI clock in 'clock' command.

Signed-off-by: Fabio Estevam <festevam@gmail.com>

mx5: Align SPI CS naming with i.MX53 reference manual

Align SPI chip select naming with i.MX53 reference manual.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

ehci-mx5/6: Make board_ehci_hcd_init() optional

A custom board_ehci_hcd_init() may be unneeded, so add a weak default
implementation doing nothing.

By the way, use simple __weak from linux/compiler.h for
board_ehci_hcd_postinit() instead of weak alias with full attribute.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

mx35pdk: Add support for OTG

Add support for the OTG port on the mx35pdk Personality board.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>

ehci-mxc: Add support for i.MX35

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

ehci-mxc: Define host offsets

Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare
to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at
SoC level.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

ehci-mxc: Make i.MX25 EHCI configurable

Use EHCI MXC configuration options for i.MX25.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matthias Weisser <weisserm@arcor.de>

ehci-mxc: Make EHCI power/oc polarities configurable

Make EHCI power and overcurrent polarities configurable. If not set, these new
configurartions keep the default register values so that existing board files
do not have to be changed.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

ehci-mx5: Add missing OC_DIS for i.MX53

The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

ehci-mx5: Fix *PM usage for i.MX53

The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

ehci-mx5: Fix OPM usage

MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like
MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

ehci-mx5: Fix OC_DIS usage

MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like MXC_H1_OC_DIS_BIT,
not the opposite.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

ehci-mx5: Clean up

Clean up ehci-mx5:
 - Fix column alignments.
 - Fix comments.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

ehci-mxc: Clean up

Clean up ehci-mxc:
 - Remove useless #if's.
 - Fix identation.
 - Issue a #error if used with an unsupported platform.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

mx31: Move EHCI definitions to ehci-fsl.h

The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to
ehci-fsl.h so that all MXC SoCs can use them.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

EXYNOS5: Enable SPI booting.

This patch enables SPI Booting for EXYNOS5

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS5: Enable SPI

This patch enables SPI driver for EXYNOS5.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

SPI: Add SPI Driver for EXYNOS.

This patch adds SPI driver for EXYNOS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: jy0922.shim@samsung.com
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS5: Add base address for SPI

Add base address definition for SPI device on Exynos.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS: Add clock for SPI

Add api to calculate and set the clock for SPI channels

Signed-off-by: James Miller <jamesmiller@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS5: Add pinmux support for SPI

This patch adds pinmux support for SPI channels

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

SMDK5250: Enable Sound

This patch enables sound support for EXYNOS5

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS: Add clock for I2S

This patch adds clock support for I2S

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS: Add I2S base address

This patch adds base address for I2S

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS: Add pinmux for I2S

This patch adds pinmux support for I2S1

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS: Add parameters required by I2S

This patch adds the audio parameters required by the I2S to play the
predefined audio data.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS: Add I2S registers

This patch add I2S registers

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Sound: Add command for audio playback

This patch adds command to test audio playback.
sound init - Initialises the audio subsystem (i2s and wm8994 codec)
sound play - Plays predefined the audio data when specified length
and frequency.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

SOUND: Add WM8994 codec

This patch adds driver for audio codec WM8994

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

SOUND: SAMSUNG: Add I2S driver

This patch adds driver for I2S interface specific to samsung.

Signed-off-by: R. Chandrasekar <rcsekar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

exynos4: universal_C210: add display support

This patch add support for display on Universal C210 board.
Width of displyed logo must be not bigger than 480 pixel and
is limited by width of the screen.
Tizen logo size is 520x120 pixels and should be resized.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

drivers: video: fix image position

This patch fixes image position on screen when images's height or width is biger then the lcd's.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

drivers: video: Add ld9040 video driver

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

misc:max8998 Add LDO macros

Add LDO7 and LDO17 macros to max8998_pmic.h necessary to power on the LCD.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

exynos4: universal_C210: use software SPI

This patch use software spi on Samsung Universal C210 board.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

s3c64xx: fix the compiler error and warning

This patch is fixing the following errors

s3c64xx.c:175: error: variable 's3c64xx_serial_drv' has initializer but incomplete type
s3c64xx.c:176: error: unknown field 'name' specified in initializer
s3c64xx.c:176: warning: excess elements in struct initializer
s3c64xx.c:176: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:177: error: unknown field 'start' specified in initializer
s3c64xx.c:177: warning: excess elements in struct initializer
s3c64xx.c:177: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:178: error: unknown field 'stop' specified in initializer
s3c64xx.c:178: warning: excess elements in struct initializer
s3c64xx.c:178: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:179: error: unknown field 'setbrg' specified in initializer
s3c64xx.c:179: warning: excess elements in struct initializer
s3c64xx.c:179: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:180: error: unknown field 'putc' specified in initializer
s3c64xx.c:180: warning: excess elements in struct initializer
s3c64xx.c:180: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:181: error: unknown field 'puts' specified in initializer
s3c64xx.c:181: warning: excess elements in struct initializer
s3c64xx.c:181: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:182: error: unknown field 'getc' specified in initializer
s3c64xx.c:182: warning: excess elements in struct initializer
s3c64xx.c:182: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c:183: error: unknown field 'tstc' specified in initializer
s3c64xx.c:183: warning: excess elements in struct initializer
s3c64xx.c:183: warning: (near initialization for 's3c64xx_serial_drv')
s3c64xx.c: In function 's3c64xx_serial_initialize':
s3c64xx.c:188: warning: implicit declaration of function 'serial_register'
s3c64xx.c: At top level:
s3c64xx.c:191: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'struct'

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>

ARM: arm1176: Define arch_cpu_init() for s3c64xx

arch_cpu_init() is removed from cpu level to SOC level for arm1176
in commit 4ea6d6b,the same is done for s3c64xx

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

SMDK5250: Config: Enable MAX77686 pmic chip

This patch enables MAX77686 pmic chip for SMDK5250.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

PMIC: MAX77686: Add support for MAX77686

This patch adds driver and register definitions for PMIC chip
MAX77686.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

dm: wdt: Move s5p watchdog timer to drivers/watchdog/

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

EXYNOS: Clock: Add common function for pll rate calculation

Moved the common code to calculate pll clock rate to new function
exynos_get_pll_clk().

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>

ARCH: EXYNOS: add support to match product id

Based upon single SoC there can be multiple variants.
This patch add support to match the complete product ID.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>

arm: trats: Power down core 1

This patch turns power down for unused core 1

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

arm:exynos4:universal: Eliminated low level init

Low level initialisation is done by another bootloader

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

arm:exynos4:universal: Use pinmux for mmc configuration

This patch use the pinmux for mmc configuration for Universal C210

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

arm:exynos4:trats: Use pinmux for mmc configuration

This patch use the pinmux for mmc configuration for Trats

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

arm:exynos4:pinmux: Modify the gpio function for mmc

This patch add pinmux settings for Exynos4 for mmc0 and mmc2

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

arm:exynos4:trats: Fix SDRAM size

Full 1GiB is visible

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

arm:exynos4:trats: Correct SDRAM configuration for trats

SDRAM setup alike to ORIGEN Dev board.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Exynos5250: Enable PXE Support

Add PXE support for the Exynos5250.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

gpio:fix: Proper handling of GPIO subsystem parts at Samsung devices

Now proper GPIO parts numbering is handled at Samsung devices.
This fix is necessary for code using GPIO located at other banks
than first.

Test HW:
- Exynos4210 - Trats
- S5PC110 - goni

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

arm1136: Fix enable_caches()

enable_caches() did not enable icache if CONFIG_SYS_ICACHE_OFF was not defined
but CONFIG_SYS_DCACHE_OFF was.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

arch-mx6: add mx6dl_pins.h

Only the values used in the sabrelite board are
added currently. Add more as other boards use them.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>