From: Lukasz Majewski <lukma@denx.de>
Date: Wed, 22 Dec 2021 09:55:07 +0000 (+0100)
Subject: usb: ehci: Refactor the ehci_mxs_toggle_clock function to be reused with DM
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=fc313d345a93a6a4edad62683191e11195a75e1e;p=u-boot.git

usb: ehci: Refactor the ehci_mxs_toggle_clock function to be reused with DM

This function is going to be reused with the CONFIG_DM_USB enabled in
the imx28 mxs USB ehci driver.

No functional changes introduced.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
---

diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index 824c620e63..a9d5d58970 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -29,6 +29,27 @@ struct ehci_mxs_port {
 	uint32_t		gate_bits;
 };
 
+static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable)
+{
+	struct mxs_register_32 *digctl_ctrl =
+		(struct mxs_register_32 *)HW_DIGCTL_CTRL;
+	int pll_offset, dig_offset;
+
+	if (enable) {
+		pll_offset = offsetof(struct mxs_register_32, reg_set);
+		dig_offset = offsetof(struct mxs_register_32, reg_clr);
+		writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset);
+		writel(port->pll_en_bits, (u32)port->pll + pll_offset);
+	} else {
+		pll_offset = offsetof(struct mxs_register_32, reg_clr);
+		dig_offset = offsetof(struct mxs_register_32, reg_set);
+		writel(port->pll_dis_bits, (u32)port->pll + pll_offset);
+		writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset);
+	}
+
+	return 0;
+}
+
 static const struct ehci_mxs_port mxs_port[] = {
 #ifdef CONFIG_EHCI_MXS_PORT0
 	{
@@ -56,27 +77,6 @@ static const struct ehci_mxs_port mxs_port[] = {
 #endif
 };
 
-static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable)
-{
-	struct mxs_register_32 *digctl_ctrl =
-		(struct mxs_register_32 *)HW_DIGCTL_CTRL;
-	int pll_offset, dig_offset;
-
-	if (enable) {
-		pll_offset = offsetof(struct mxs_register_32, reg_set);
-		dig_offset = offsetof(struct mxs_register_32, reg_clr);
-		writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset);
-		writel(port->pll_en_bits, (u32)port->pll + pll_offset);
-	} else {
-		pll_offset = offsetof(struct mxs_register_32, reg_clr);
-		dig_offset = offsetof(struct mxs_register_32, reg_set);
-		writel(port->pll_dis_bits, (u32)port->pll + pll_offset);
-		writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset);
-	}
-
-	return 0;
-}
-
 int __weak board_ehci_hcd_init(int port)
 {
 	return 0;