From: Michal Simek <michal.simek@xilinx.com>
Date: Mon, 28 Jan 2019 10:08:00 +0000 (+0100)
Subject: arm64: versal: Remove one level of indentation in board_early_init_r()
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=fb771793bd5daa8b4dcf5664ea0cf02b1ca2ae0f;p=u-boot.git

arm64: versal: Remove one level of indentation in board_early_init_r()

Simplify code indentation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 2b3a40b73a..fe61125d92 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -21,42 +21,43 @@ int board_init(void)
 
 int board_early_init_r(void)
 {
-	if (current_el() == 3) {
-		u32 val;
-
-		writel(IOU_SWITCH_CTRL_CLKACT_BIT |
-		       (0x20 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
-		       &crlapb_base->iou_switch_ctrl);
-
-		/* Global timer init - Program time stamp reference clk */
-		val = readl(&crlapb_base->timestamp_ref_ctrl);
-		val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
-		writel(val, &crlapb_base->timestamp_ref_ctrl);
-
-		debug("ref ctrl 0x%x\n",
-		      readl(&crlapb_base->timestamp_ref_ctrl));
-
-		/* Clear reset of timestamp reg */
-		writel(0, &crlapb_base->rst_timestamp);
-
-		/*
-		 * Program freq register in System counter and
-		 * enable system counter.
-		 */
-		writel(COUNTER_FREQUENCY,
-		       &iou_scntr_secure->base_frequency_id_register);
-
-		debug("counter val 0x%x\n",
-		      readl(&iou_scntr_secure->base_frequency_id_register));
-
-		writel(IOU_SCNTRS_CONTROL_EN,
-		       &iou_scntr_secure->counter_control_register);
-
-		debug("scntrs control 0x%x\n",
-		      readl(&iou_scntr_secure->counter_control_register));
-		debug("timer 0x%llx\n", get_ticks());
-		debug("timer 0x%llx\n", get_ticks());
-	}
+	u32 val;
+
+	if (current_el() != 3)
+		return 0;
+
+	writel(IOU_SWITCH_CTRL_CLKACT_BIT |
+	       (0x20 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
+	       &crlapb_base->iou_switch_ctrl);
+
+	/* Global timer init - Program time stamp reference clk */
+	val = readl(&crlapb_base->timestamp_ref_ctrl);
+	val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
+	writel(val, &crlapb_base->timestamp_ref_ctrl);
+
+	debug("ref ctrl 0x%x\n",
+	      readl(&crlapb_base->timestamp_ref_ctrl));
+
+	/* Clear reset of timestamp reg */
+	writel(0, &crlapb_base->rst_timestamp);
+
+	/*
+	 * Program freq register in System counter and
+	 * enable system counter.
+	 */
+	writel(COUNTER_FREQUENCY,
+	       &iou_scntr_secure->base_frequency_id_register);
+
+	debug("counter val 0x%x\n",
+	      readl(&iou_scntr_secure->base_frequency_id_register));
+
+	writel(IOU_SCNTRS_CONTROL_EN,
+	       &iou_scntr_secure->counter_control_register);
+
+	debug("scntrs control 0x%x\n",
+	      readl(&iou_scntr_secure->counter_control_register));
+	debug("timer 0x%llx\n", get_ticks());
+	debug("timer 0x%llx\n", get_ticks());
 
 	return 0;
 }