From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 30 Dec 2019 12:04:07 +0000 (+0530)
Subject: ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=f838ebfe5a80a134c7df0c135431169f30bef7dc;p=u-boot.git

ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL

The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
differs from the original one for a few details, including the
ethernet PHY interface clock provider.

With this commit, the ethernet interface works properly:
SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver

While before using the 1.5 version, ethernet failed to startup
do to un-clocked PHY interface:
fec 2188000.ethernet eth0: could not attach to PHY

Similar fix has merged for i.Core MX6Q but missed to update for DL.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---

diff --git a/arch/arm/dts/imx6dl-icore-mipi.dts b/arch/arm/dts/imx6dl-icore-mipi.dts
index e43bccb78a..d8f3821a0f 100644
--- a/arch/arm/dts/imx6dl-icore-mipi.dts
+++ b/arch/arm/dts/imx6dl-icore-mipi.dts
@@ -8,7 +8,7 @@
 /dts-v1/;
 
 #include "imx6dl.dtsi"
-#include "imx6qdl-icore.dtsi"
+#include "imx6qdl-icore-1.5.dtsi"
 
 / {
 	model = "Engicam i.CoreM6 DualLite/Solo MIPI Starter Kit";