From: Wasim Khan <wasim.khan@nxp.com>
Date: Mon, 28 Sep 2020 10:56:05 +0000 (+0530)
Subject: pci: ls_pcie_g4: Print pcie controller number starting from 1
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=eac364416c62ea1f49934f762e184616a04adede;p=u-boot.git

pci: ls_pcie_g4: Print pcie controller number starting from 1

Print pcie controller number starting from 1

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---

diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_gen4.c
index 428bfcab09..0226bde678 100644
--- a/drivers/pci/pcie_layerscape_gen4.c
+++ b/drivers/pci/pcie_layerscape_gen4.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2020 NXP
  *
  * PCIe Gen4 driver for NXP Layerscape SoCs
  * Author: Hou Zhiqiang <Minder.Hou@gmail.com>
@@ -472,7 +472,8 @@ static int ls_pcie_g4_probe(struct udevice *dev)
 
 	pcie->enabled = is_serdes_configured(PCIE_SRDS_PRTCL(pcie->idx));
 	if (!pcie->enabled) {
-		printf("PCIe%d: %s disabled\n", pcie->idx, dev->name);
+		printf("PCIe%d: %s disabled\n", PCIE_SRDS_PRTCL(pcie->idx),
+		       dev->name);
 		return 0;
 	}
 
@@ -522,10 +523,12 @@ static int ls_pcie_g4_probe(struct udevice *dev)
 	pcie->mode = readb(pcie->ccsr + PCI_HEADER_TYPE) & 0x7f;
 
 	if (pcie->mode == PCI_HEADER_TYPE_NORMAL) {
-		printf("PCIe%u: %s %s", pcie->idx, dev->name, "Endpoint");
+		printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
+		       "Endpoint");
 		ls_pcie_g4_setup_ep(pcie);
 	} else {
-		printf("PCIe%u: %s %s", pcie->idx, dev->name, "Root Complex");
+		printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
+		       "Root Complex");
 		ls_pcie_g4_setup_ctrl(pcie);
 	}