From: Jorge Ramirez-Ortiz Date: Wed, 11 Dec 2019 09:42:36 +0000 (+0100) Subject: tools/imximage: share DCD information via Kconfig X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=e97bdfa5da70600e9755d6f70713744ed25f62c3;p=u-boot.git tools/imximage: share DCD information via Kconfig IMX based platforms can have the DCD table located on different addresses due to differences in their memory maps (ie iMX7ULP). This information is required by the user to sign the images for secure boot so continue making it accessible via mkimage. Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Fabio Estevam Signed-off-by: Stefano Babic --- diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index fee6d56c4d..4ce2799b72 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -113,3 +113,14 @@ config DDRMC_VF610_CALIBRATION config SPL_IMX_ROMAPI_LOADADDR hex "Default load address to load image through ROM API" depends on IMX8MN + +config IMX_DCD_ADDR + hex "DCD Blocks location on the image" + default 0x00910000 if !ARCH_MX7ULP + default 0x2f010000 if ARCH_MX7ULP + help + Indicates where the Device Configuration Data, a binary table used by + the ROM code to configure the device at early boot stage, is located. + This information is shared with the user via mkimage -l just so the + image can be signed. + diff --git a/tools/imximage.c b/tools/imximage.c index d7c0b6e883..d7edd3c52f 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -11,9 +11,13 @@ #include "imagetool.h" #include #include "imximage.h" +#include #define UNDEFINED 0xFFFFFFFF +#if !defined(CONFIG_IMX_DCD_ADDR) +#define CONFIG_IMX_DCD_ADDR 0x00910000 +#endif /* * Supported commands for configuration file */ @@ -524,8 +528,8 @@ static void print_hdr_v2(struct imx_header *imx_hdr) printf("HAB Blocks: 0x%08x 0x%08x 0x%08x\n", (uint32_t)fhdr_v2->self, 0, (uint32_t)(fhdr_v2->csf - fhdr_v2->self)); - printf("DCD Blocks: 0x00910000 0x%08x 0x%08x\n", - offs, be16_to_cpu(dcdlen)); + printf("DCD Blocks: 0x%08x 0x%08x 0x%08x\n", + offs, CONFIG_IMX_DCD_ADDR, be16_to_cpu(dcdlen)); } } else { imx_header_v2_t *next_hdr_v2;