From: Stefan Roese <sr@denx.de>
Date: Thu, 23 Jul 2020 14:34:10 +0000 (+0200)
Subject: pci: pci-uclass: Dynamically allocate the PCI regions
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=e002474158d1054a7a2ff9a66149384c639ff242;p=u-boot.git

pci: pci-uclass: Dynamically allocate the PCI regions

Instead of using a fixed length pre-allocated array of regions, this
patch moves to dynamically allocating the regions based on the number
of available regions plus the necessary regions for DRAM banks.

Since MAX_PCI_REGIONS is not needed any more, its removed completely
with this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
---

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 601557a875..337ac137d1 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -874,6 +874,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
 	struct bd_info *bd = gd->bd;
 	int cells_per_record;
 	const u32 *prop;
+	int max_regions;
 	int len;
 	int i;
 
@@ -893,7 +894,13 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
 	hose->region_count = 0;
 	debug("%s: len=%d, cells_per_record=%d\n", __func__, len,
 	      cells_per_record);
-	for (i = 0; i < MAX_PCI_REGIONS; i++, len -= cells_per_record) {
+
+	/* Dynamically allocate the regions array */
+	max_regions = len / cells_per_record + CONFIG_NR_DRAM_BANKS;
+	hose->regions = (struct pci_region *)
+		calloc(1, max_regions * sizeof(struct pci_region));
+
+	for (i = 0; i < max_regions; i++, len -= cells_per_record) {
 		u64 pci_addr, addr, size;
 		int space_code;
 		u32 flags;
@@ -943,11 +950,6 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node,
 		return;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
-		if (hose->region_count == MAX_PCI_REGIONS) {
-			pr_err("maximum number of regions parsed, aborting\n");
-			break;
-		}
-
 		if (bd->bi_dram[i].size) {
 			pci_set_region(hose->regions + hose->region_count++,
 				       bd->bi_dram[i].start,
diff --git a/include/pci.h b/include/pci.h
index 2089db9f16..da755af852 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -590,8 +590,6 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev,
 extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
 				      struct pci_config_table *);
 
-#define MAX_PCI_REGIONS		7
-
 #define INDIRECT_TYPE_NO_PCIE_LINK	1
 
 /**
@@ -632,7 +630,7 @@ struct pci_controller {
 	 * for PCI controllers and a separate UCLASS (or perhaps
 	 * UCLASS_PCI_GENERIC) is used for bridges.
 	 */
-	struct pci_region regions[MAX_PCI_REGIONS];
+	struct pci_region *regions;
 	int region_count;
 
 	struct pci_config_table *config_table;