From: Markus Klotzbuecher <mk@creamnet.de>
Date: Tue, 9 Jan 2007 13:57:10 +0000 (+0100)
Subject: Update the SPC1920 CMB PLD driver
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=d8d9de1a02fbd880b613d607143d1f57342affc7;p=u-boot.git

Update the SPC1920 CMB PLD driver
---

diff --git a/board/spc1920/pld.h b/board/spc1920/pld.h
index 3254f820c1..5beb71b5cc 100644
--- a/board/spc1920/pld.h
+++ b/board/spc1920/pld.h
@@ -5,8 +5,8 @@ typedef struct spc1920_pld {
 	uchar com1_en;
 	uchar dsp_reset;
 	uchar dsp_hpi_on;
+	uchar superv_mode;
 	uchar codec_dsp_power_en;
-	uchar clk2_en;
 	uchar clk3_select;
 	uchar clk4_select;
 } spc1920_pld_t;
diff --git a/include/configs/spc1920.h b/include/configs/spc1920.h
index 6db0d1a1c8..f8909b1d1d 100644
--- a/include/configs/spc1920.h
+++ b/include/configs/spc1920.h
@@ -89,7 +89,7 @@
 			 | CFG_CMD_PING \
 			 | CFG_CMD_DHCP \
 			 | CFG_CMD_IMMAP \
-                         | CFG_CMD_I2C \
+			 | CFG_CMD_I2C \
 			 | CFG_CMD_MII)
 			/* & ~( CFG_CMD_NET)) */
 
@@ -217,9 +217,9 @@
 #define I2C_TRISTATE   (immr->im_cpm.cp_pbdir &= ~PB_SDA)
 #define I2C_READ       ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
 #define I2C_SDA(bit)   if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
-                       else    immr->im_cpm.cp_pbdat &= ~PB_SDA
+		       else    immr->im_cpm.cp_pbdat &= ~PB_SDA
 #define I2C_SCL(bit)   if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
-                       else    immr->im_cpm.cp_pbdat &= ~PB_SCL
+		       else    immr->im_cpm.cp_pbdat &= ~PB_SCL
 #define I2C_DELAY      udelay(2)       /* 1/4 I2C clock duration */
 #endif /* CONFIG_SOFT_I2C */
 #endif
@@ -386,9 +386,11 @@
 #define HPI_HPID_NOINC_2       HPI_REG(0x3000000 + 2)
 #endif /* CONFIG_SPC1920_HPI_TEST */
 
-/* PLD CS5 */
+/*
+ * PLD CS5 
+ */
 #define CFG_SPC1920_PLD_BASE	0x80000000
-#define CFG_PRELIM_OR5_AM	0xffff8000
+#define CFG_PRELIM_OR5_AM	0xfff00000
 
 #define CFG_OR5_PRELIM		(CFG_PRELIM_OR5_AM | \
 					OR_CSNT_SAM | \
@@ -399,10 +401,6 @@
 
 #define CFG_BR5_PRELIM ((CFG_SPC1920_PLD_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
 
-/* #define CFG_PLD_BASE   0x30000000 */
-/* #define CFG_OR5_PRELIM 0xffff1110 */
-/* #define CFG_BR5_PRELIM 0x30000401 */
-
 /*
  * Internal Definitions
  *