From: Christophe Kerello <christophe.kerello@st.com>
Date: Mon, 9 Jul 2018 13:32:38 +0000 (+0200)
Subject: spi: stm32_qspi: rework mode management
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=d68b6ad1382b5357e77ce6b4d3fd74831835d62e;p=u-boot.git

spi: stm32_qspi: rework mode management

This patch solves quad read issue with Macronix/Micron spi nor.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---

diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 81b84625ba..3b92254a5c 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -229,21 +229,21 @@ static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv, u8 fmode)
 
 	imode = STM32_QSPI_CCR_IMODE_ONE_LINE;
 	admode = STM32_QSPI_CCR_ADMODE_ONE_LINE;
-
-	if (mode & SPI_RX_QUAD) {
-		dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
-		if (mode & SPI_TX_QUAD) {
-			imode = STM32_QSPI_CCR_IMODE_FOUR_LINE;
-			admode = STM32_QSPI_CCR_ADMODE_FOUR_LINE;
-		}
-	} else if (mode & SPI_RX_DUAL) {
-		dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
-		if (mode & SPI_TX_DUAL) {
-			imode = STM32_QSPI_CCR_IMODE_TWO_LINE;
-			admode = STM32_QSPI_CCR_ADMODE_TWO_LINE;
+	dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
+
+	if ((priv->command & CMD_HAS_ADR) && (priv->command & CMD_HAS_DATA)) {
+		if (fmode == STM32_QSPI_CCR_IND_WRITE) {
+			if (mode & SPI_TX_QUAD)
+				dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
+			else if (mode & SPI_TX_DUAL)
+				dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
+		} else if ((fmode == STM32_QSPI_CCR_MEM_MAP) ||
+			 (fmode == STM32_QSPI_CCR_IND_READ)) {
+			if (mode & SPI_RX_QUAD)
+				dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
+			else if (mode & SPI_RX_DUAL)
+				dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
 		}
-	} else {
-		dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
 	}
 
 	if (priv->command & CMD_HAS_DATA)