From: Simon Glass Date: Mon, 1 Apr 2019 20:38:38 +0000 (-0700) Subject: tegra: Add a delay in clock_start_periph_pll() X-Git-Tag: v2025.01-rc5-pxa1908~2952^2~5 X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=c9d7542bf3014f46ce55e212122f02b77dd651a1;p=u-boot.git tegra: Add a delay in clock_start_periph_pll() This function enables a peripheral clock and then immediately sets its divider. Add a delay to allow the clock to settle first. This matches the delay in other places which do a similar thing. Without this, the I2S device on Nyan does not init properly. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 096330748f..dc5f16b41b 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -477,6 +477,7 @@ unsigned clock_start_periph_pll(enum periph_id periph_id, reset_set_enable(periph_id, 1); clock_enable(periph_id); + udelay(2); effective_rate = clock_adjust_periph_pll_div(periph_id, parent, rate, NULL);