From: Angelo Dureghello <angelo@sysam.it>
Date: Wed, 31 May 2017 19:32:48 +0000 (+0200)
Subject: m68k: fix cache.c for Coldfire V4E
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=c533cfcd93ba6c8b30b3e10b5abf41fda90f9cf8;p=u-boot.git

m68k: fix cache.c for Coldfire V4E

- fix cache.c CONFIG_CF_V4e to CONFIG_CF_V4E
- fix cache.c to properly enable/disable cache for V4E

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
---

diff --git a/arch/m68k/lib/cache.c b/arch/m68k/lib/cache.c
index ace791beb1..a8a292b77e 100644
--- a/arch/m68k/lib/cache.c
+++ b/arch/m68k/lib/cache.c
@@ -33,12 +33,13 @@ void icache_enable(void)
 
 	*cf_icache_status = 1;
 
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
 	__asm__ __volatile__("movec %0, %%acr2"::"r"(CONFIG_SYS_CACHE_ACR2));
 	__asm__ __volatile__("movec %0, %%acr3"::"r"(CONFIG_SYS_CACHE_ACR3));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
 	__asm__ __volatile__("movec %0, %%acr6"::"r"(CONFIG_SYS_CACHE_ACR6));
 	__asm__ __volatile__("movec %0, %%acr7"::"r"(CONFIG_SYS_CACHE_ACR7));
+#endif
 #else
 	__asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
 	__asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
@@ -54,16 +55,16 @@ void icache_disable(void)
 	*cf_icache_status = 0;
 	icache_invalid();
 
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
 	__asm__ __volatile__("movec %0, %%acr2"::"r"(temp));
 	__asm__ __volatile__("movec %0, %%acr3"::"r"(temp));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
 	__asm__ __volatile__("movec %0, %%acr6"::"r"(temp));
 	__asm__ __volatile__("movec %0, %%acr7"::"r"(temp));
+#endif
 #else
 	__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
 	__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
-
 #endif
 }
 
@@ -87,13 +88,13 @@ void dcache_enable(void)
 	dcache_invalid();
 	*cf_dcache_status = 1;
 
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
 	__asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
 	__asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
 	__asm__ __volatile__("movec %0, %%acr4"::"r"(CONFIG_SYS_CACHE_ACR4));
 	__asm__ __volatile__("movec %0, %%acr5"::"r"(CONFIG_SYS_CACHE_ACR5));
-
+#endif
 #endif
 
 	__asm__ __volatile__("movec %0, %%cacr"::"r"(CONFIG_SYS_CACHE_DCACR));
@@ -108,19 +109,19 @@ void dcache_disable(void)
 
 	__asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
 
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
 	__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
 	__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
 	__asm__ __volatile__("movec %0, %%acr4"::"r"(temp));
 	__asm__ __volatile__("movec %0, %%acr5"::"r"(temp));
-
+#endif
 #endif
 }
 
 void dcache_invalid(void)
 {
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
 	u32 temp;
 
 	temp = CONFIG_SYS_DCACHE_INV;