From: Yu Chien Peter Lin <peterlin@andestech.com>
Date: Mon, 6 Feb 2023 08:10:48 +0000 (+0800)
Subject: riscv: ae350: dts: Update L2 cache compatible string
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=c1b88196807e1dd797aea6cc7ddb0dce02b4e898;p=u-boot.git

riscv: ae350: dts: Update L2 cache compatible string

Update the compatible string of L2 cache.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
---

diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts
index 96ef8bd8dd..61af6d5465 100644
--- a/arch/riscv/dts/ae350_32.dts
+++ b/arch/riscv/dts/ae350_32.dts
@@ -112,7 +112,7 @@
 	};
 
 	L2: l2-cache@e0500000 {
-		compatible = "v5l2cache";
+		compatible = "cache";
 		cache-level = <2>;
 		cache-size = <0x40000>;
 		reg = <0xe0500000 0x40000>;
diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts
index cddbaec98a..8c7db29b4f 100644
--- a/arch/riscv/dts/ae350_64.dts
+++ b/arch/riscv/dts/ae350_64.dts
@@ -112,7 +112,7 @@
 	};
 
 	L2: l2-cache@e0500000 {
-		compatible = "v5l2cache";
+		compatible = "cache";
 		cache-level = <2>;
 		cache-size = <0x40000>;
 		reg = <0x0 0xe0500000 0x0 0x40000>;
diff --git a/drivers/cache/cache-v5l2.c b/drivers/cache/cache-v5l2.c
index e782430c57..c6d3a8f893 100644
--- a/drivers/cache/cache-v5l2.c
+++ b/drivers/cache/cache-v5l2.c
@@ -184,7 +184,7 @@ static int v5l2_probe(struct udevice *dev)
 }
 
 static const struct udevice_id v5l2_cache_ids[] = {
-	{ .compatible = "v5l2cache" },
+	{ .compatible = "cache" },
 	{}
 };