From: Tom Rini <trini@konsulko.com>
Date: Mon, 2 Mar 2020 14:20:12 +0000 (-0500)
Subject: Merge tag 'xilinx-for-v2020.04-rc4' of https://gitlab.denx.de/u-boot/custodians/u... 
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=bd7bb38699412bf95449bf9f23aa625c0436eae6;p=u-boot.git

Merge tag 'xilinx-for-v2020.04-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx fixes for v2020.04-rc4

- Fix link good bit handling in dp83867
- Rename generic Zynq defconfig
- Fix zybo z7 low leve setup
- Fix error path in zynq_gem driver and fix 64bit usage
- Fix invalid clock name quieries for Versal
- Fix zynq/zynqmp SPL low level configuration via DT selection
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bd7bb38699412bf95449bf9f23aa625c0436eae6