From: Tom Rini <trini@konsulko.com>
Date: Sun, 4 Dec 2022 15:13:31 +0000 (-0500)
Subject: global: Migrate CONFIG_PL01x_PORTS to CFG
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=b861574bd9e7c480ceec47b77a59ed5a52b57937;p=u-boot.git

global: Migrate CONFIG_PL01x_PORTS to CFG

Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS

Signed-off-by: Tom Rini <trini@konsulko.com>
---

diff --git a/README b/README
index 8354cf5699..12672d2bfb 100644
--- a/README
+++ b/README
@@ -418,7 +418,7 @@ The following options need to be configured:
 		If you have Amba PrimeCell PL011 UARTs, set this variable to
 		the clock speed of the UARTs.
 
-		CONFIG_PL01x_PORTS
+		CFG_PL01x_PORTS
 
 		If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
 		define this to a list of base addresses for each (supported)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index dd2881931d..7449e9b904 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #ifndef CONFIG_DM_SERIAL
 
-static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
+static volatile unsigned char *const port[] = CFG_PL01x_PORTS;
 static enum pl01x_type pl01x_type __section(".data");
 static struct pl01x_regs *base_regs __section(".data");
 #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index f8a20ea16f..6f46ca78d4 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -45,7 +45,7 @@
 #define CFG_SYS_SERIAL2		0x21e0000
 #define CFG_SYS_SERIAL3		0x21f0000
 /*below might needs to be removed*/
-#define CONFIG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
+#define CFG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
 					(void *)CFG_SYS_SERIAL1, \
 					(void *)CFG_SYS_SERIAL2, \
 					(void *)CFG_SYS_SERIAL3 }
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 90cb1a5e4a..6ebfee6927 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -78,7 +78,7 @@
  * Conflicts with AUART driver which can be set by board.
  */
 #define CFG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
+#define CFG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
 /* Default baudrate can be overridden by board! */
 
 /* NAND */
diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h
index 0e7d01925e..2fa44e65fc 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -77,7 +77,7 @@
  * serial console configuration
  */
 #define CFG_PL011_CLOCK		50000000
-#define CONFIG_PL01x_PORTS		{(void *)PHY_BASEADDR_UART0, \
+#define CFG_PL01x_PORTS		{(void *)PHY_BASEADDR_UART0, \
 					 (void *)PHY_BASEADDR_UART1, \
 					 (void *)PHY_BASEADDR_UART2, \
 					 (void *)PHY_BASEADDR_UART3}
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index 350cc69c28..8f44c6f66a 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -32,7 +32,7 @@
 /* Serial (pl011)       */
 #define UART_CLK			(62500000)
 #define CFG_PL011_CLOCK		UART_CLK
-#define CONFIG_PL01x_PORTS		{(void *)(0x2a400000)}
+#define CFG_PL01x_PORTS		{(void *)(0x2a400000)}
 
 /* Support MTD */
 #define CFG_SYS_FLASH_BASE		(0x08000000)
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index 3fc70de577..ba7731bfca 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -117,7 +117,7 @@
 
 /* PL011 Serial Configuration */
 #define CFG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
+#define CFG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
 					 (void *)CFG_SYS_SERIAL1}
 
 #define CFG_SYS_SERIAL0		V2M_UART0