From: Simon Glass <sjg@chromium.org>
Date: Fri, 26 Apr 2019 03:59:01 +0000 (-0600)
Subject: x86: pch: Add an ioctl to read power-management info
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=b69b603bcdeb05f846f76da81e4a681aff6a1001;p=u-boot.git

x86: pch: Add an ioctl to read power-management info

Add a new ioctl() request to read information about the power-management
system. This can be used to power off the device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

diff --git a/include/pch.h b/include/pch.h
index 046a5fde3a..0b44b66df9 100644
--- a/include/pch.h
+++ b/include/pch.h
@@ -16,6 +16,9 @@ enum pch_req_t {
 	/* Returns HDA config info if Azalia V1CTL enabled, -ENOENT if not */
 	PCH_REQ_HDA_CONFIG,
 
+	/* Fills out a struct pch_pmbase_info if available */
+	PCH_REQ_PMBASE_INFO,
+
 	PCH_REQ_TEST1,		/* Test requests for sandbox driver */
 	PCH_REQ_TEST2,
 	PCH_REQ_TEST3,
@@ -23,6 +26,21 @@ enum pch_req_t {
 	PCH_REQ_COUNT,		/* Number of ioctrls supported */
 };
 
+/**
+ * struct pch_pmbase_info - Information filled in by PCH_REQ_PMBASE_INFO
+ *
+ * @pmbase: IO address of power-management controller
+ * @gpio0_en_ofs: Offset of GPIO0 enable register
+ * @pm1_sts_ofs: Offset of status register
+ * @pm1_cnt_ofs: Offset of control register
+ */
+struct pch_pmbase_info {
+	u16 base;
+	u8 gpio0_en_ofs;
+	u8 pm1_sts_ofs;
+	u8 pm1_cnt_ofs;
+};
+
 /**
  * struct pch_ops - Operations for the Platform Controller Hub
  *