From: Tom Rini Date: Tue, 13 Sep 2022 13:34:12 +0000 (-0400) Subject: Merge tag 'xilinx-for-v2023.01-rc1' of https://source.denx.de/u-boot/custodians/u... X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=b3d9c0b6d5895e91b3e6b3566423d09e5a4d5ee8;p=u-boot.git Merge tag 'xilinx-for-v2023.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2023.01-rc1 cmd: - bdinfo - guard LMB code to run only when LMB is enabled timer: - convert arm twd timer to DM power-domain: - Skip loading config object for Versal xilinx: - Fix logic when dfu_alt_info is generated - Define only mmc devnum not partition - Add xlnx prefix to GEM compatible string - Add missing tca6416 to zynqmp SC - vck190 - Add env redund offset - Enable CMD_GREPENV/SETEXPR by default - Move board_get_usable_ram_top() to common location - Add support for SOC detection net/gem: - Check rate before setting it up microblaze: - drop CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE - Show cache size in bdinfo spi: - cadence_qspi: driver updates - zynqmp_gqspi: driver updates - zynqmp_gqspi: Add tap delays for Versal zynq: - Enable mkeficapsule compilation - Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME for dfu_alt_info - Align bss and end of u-boot image to 64bits - Align qspi node name with Linux kernel - DT: List OCM memory zynqmp: - Fix AES cache handling with a user provided key - SOM: Add mtd partition for secure OS storage area - Add ref_clk property for REFCLKPER calculation - Fix mdio bus description for vck190-sc xilinx-mini: - Remove unneeded configs - Disable LMB versal: - Enable i2c mux pca954x by default - Define CONFIG_CQSPI_REF_CLK - Enable power domain driver - Enable zynqmp_gqspi driver --- b3d9c0b6d5895e91b3e6b3566423d09e5a4d5ee8