From: Vignesh Raghavendra <vigneshr@ti.com>
Date: Mon, 27 Jan 2020 12:29:25 +0000 (+0530)
Subject: arm: dts: k3-j721e-common-proc-board: Enable USB0 in peripheral mode
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=b070f58b44f9c738fd197e203c193ddbddcefdbb;p=u-boot.git

arm: dts: k3-j721e-common-proc-board: Enable USB0 in peripheral mode

Enable USB0 in peripheral mode so that it be used for DFU

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---

diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 28a355d49c..585cc83963 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -40,6 +40,13 @@
 		clock-frequency = <200000000>;
 		u-boot,dm-spl;
 	};
+
+	clk_19_2mhz: dummy_clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <19200000>;
+		u-boot,dm-spl;
+	};
 };
 
 &cbass_mcu_wakeup {
@@ -207,4 +214,15 @@
 	u-boot,dm-spl;
 };
 
+&usbss0 {
+	/delete-property/ power-domains;
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-parents;
+	clocks = <&clk_19_2mhz>;
+	clock-names = "usb2_refclk";
+	pinctrl-names = "default";
+	pinctrl-0 = <&main_usbss0_pins_default>;
+	ti,vbus-divider;
+};
+
 #include "k3-j721e-common-proc-board-u-boot.dtsi"