From: Wolfgang Denk <wd@denx.de>
Date: Thu, 14 Feb 2008 23:26:52 +0000 (+0100)
Subject: Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=9e04a8138892d64848dc6e8e74213086d9190d9a;p=u-boot.git

Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx

Conflicts:

	common/cmd_reginfo.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
---

9e04a8138892d64848dc6e8e74213086d9190d9a
diff --cc common/cmd_reginfo.c
index 980664d142,11af22bc3f..dd808edf2a
--- a/common/cmd_reginfo.c
+++ b/common/cmd_reginfo.c
@@@ -329,47 -331,10 +331,50 @@@ int do_reginfo (cmd_tbl_t *cmdtp, int f
  		*(volatile ulong*)MPC5XXX_SDRAM_CS0CFG);
  	printf ("\tSDRAMCS1: %08X\n",
  		*(volatile ulong*)MPC5XXX_SDRAM_CS1CFG);
+ #elif defined(CONFIG_MPC86xx)
+ 	mpc86xx_reginfo();
 -#endif /* CONFIG_MPC86xx */
 +
 +#elif defined(CONFIG_BLACKFIN)
 +	puts("\nSystem Configuration registers\n");
 +
 +	puts("\nPLL Registers\n");
 +	printf("\tPLL_DIV:   0x%04x   PLL_CTL:      0x%04x\n",
 +		bfin_read_PLL_DIV(), bfin_read_PLL_CTL());
 +	printf("\tPLL_STAT:  0x%04x   PLL_LOCKCNT:  0x%04x\n",
 +		bfin_read_PLL_STAT(), bfin_read_PLL_LOCKCNT());
 +	printf("\tVR_CTL:    0x%04x\n", bfin_read_VR_CTL());
 +
 +	puts("\nEBIU AMC Registers\n");
 +	printf("\tEBIU_AMGCTL:   0x%04x\n", bfin_read_EBIU_AMGCTL());
 +	printf("\tEBIU_AMBCTL0:  0x%08x   EBIU_AMBCTL1:  0x%08x\n",
 +		bfin_read_EBIU_AMBCTL0(), bfin_read_EBIU_AMBCTL1());
 +# ifdef EBIU_MODE
 +	printf("\tEBIU_MBSCTL:   0x%08x   EBIU_ARBSTAT:  0x%08x\n",
 +		bfin_read_EBIU_MBSCTL(), bfin_read_EBIU_ARBSTAT());
 +	printf("\tEBIU_MODE:     0x%08x   EBIU_FCTL:     0x%08x\n",
 +		bfin_read_EBIU_MODE(), bfin_read_EBIU_FCTL());
 +# endif
 +
 +# ifdef EBIU_RSTCTL
 +	puts("\nEBIU DDR Registers\n");
 +	printf("\tEBIU_DDRCTL0:  0x%08x   EBIU_DDRCTL1:  0x%08x\n",
 +		bfin_read_EBIU_DDRCTL0(), bfin_read_EBIU_DDRCTL1());
 +	printf("\tEBIU_DDRCTL2:  0x%08x   EBIU_DDRCTL3:  0x%08x\n",
 +		bfin_read_EBIU_DDRCTL2(), bfin_read_EBIU_DDRCTL3());
 +	printf("\tEBIU_DDRQUE:   0x%08x   EBIU_RSTCTL    0x%04x\n",
 +		bfin_read_EBIU_DDRQUE(), bfin_read_EBIU_RSTCTL());
 +	printf("\tEBIU_ERRADD:   0x%08x   EBIU_ERRMST:   0x%04x\n",
 +		bfin_read_EBIU_ERRADD(), bfin_read_EBIU_ERRMST());
 +# else
 +	puts("\nEBIU SDC Registers\n");
 +	printf("\tEBIU_SDRRC:   0x%04x   EBIU_SDBCTL:  0x%04x\n",
 +		bfin_read_EBIU_SDRRC(), bfin_read_EBIU_SDBCTL());
 +	printf("\tEBIU_SDSTAT:  0x%04x   EBIU_SDGCTL:  0x%08x\n",
 +		bfin_read_EBIU_SDSTAT(), bfin_read_EBIU_SDGCTL());
 +# endif
 +
- #endif /* CONFIG_MPC5200 */
++#endif /* CONFIG_BLACKFIN */
+ 
  	return 0;
  }