From: Tom Rini <trini@konsulko.com>
Date: Fri, 14 Jun 2024 16:42:35 +0000 (-0600)
Subject: Merge patch series "binman: am62a/62p: add support for signing TIFSStub"
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=93458ba599f753dcc5b6fea661cf71a50e8c5bd2;p=u-boot.git

Merge patch series "binman: am62a/62p: add support for signing TIFSStub"

Dhruva Gole <d-gole@ti.com> says:

Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices
and include them in tispl.bin and tispl.bin_unsigned in AM62A.

AM62P doesn't have any GP support, hence not applicable.

These changes are required for Low Power Mode features to work on these
SoCs as this TIFS Stub gets used in the Low Power Exit sequences.

Boot tested on both platforms that are being touched:

[0] AM62A, [1] AM62P

[0] https://gist.github.com/DhruvaG2000/d5f2a46818d8025a540efe9289feacb4
[1] https://gist.github.com/DhruvaG2000/ce29f6e9315a78d3e9e5810f55f17f43
---

93458ba599f753dcc5b6fea661cf71a50e8c5bd2
diff --cc arch/arm/dts/k3-am62a-sk-binman.dtsi
index 0658b00ff0,d7ecd84c83..2a8c260387
--- a/arch/arm/dts/k3-am62a-sk-binman.dtsi
+++ b/arch/arm/dts/k3-am62a-sk-binman.dtsi
@@@ -152,9 -152,64 +152,65 @@@
  		filename = "ti-dm.bin";
  		blob-ext {
  			filename = "ti-dm/am62axx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
 +			optional;
  		};
  	};
+ 
+ 	tifsstub-hs {
+ 		filename = "tifsstub.bin_hs";
+ 		ti-secure-rom {
+ 			content = <&tifsstub_hs_cert>;
+ 			core = "secure";
+ 			load = <0x60000>;
+ 			sw-rev = <CONFIG_K3_X509_SWRV>;
+ 			keyfile = "custMpk.pem";
+ 			countersign;
+ 			tifsstub;
+ 		};
+ 		tifsstub_hs_cert: tifsstub-hs-cert.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62ax-hs-cert.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 		tifsstub_hs_enc: tifsstub-hs-enc.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62ax-hs-enc.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 	};
+ 
+ 	tifsstub-fs {
+ 		filename = "tifsstub.bin_fs";
+ 		tifsstub_fs_cert: tifsstub-fs-cert.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62ax-hs-cert.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 		tifsstub_fs_enc: tifsstub-fs-enc.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62ax-hs-enc.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 
+ 	};
+ 
+ 	tifsstub-gp {
+ 		filename = "tifsstub.bin_gp";
+ 		ti-secure-rom {
+ 			content = <&tifsstub_gp>;
+ 			core = "secure";
+ 			load = <0x60000>;
+ 			sw-rev = <CONFIG_K3_X509_SWRV>;
+ 			keyfile = "ti-degenerate-key.pem";
+ 			tifsstub;
+ 		};
+ 		tifsstub_gp: tifsstub-gp.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62ax-gp.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 	};
+ 
  	ti-spl {
  		insert-template = <&ti_spl_template>;
  
diff --cc arch/arm/dts/k3-am62p-sk-binman.dtsi
index eca532d710,210179756a..2177d5428d
--- a/arch/arm/dts/k3-am62p-sk-binman.dtsi
+++ b/arch/arm/dts/k3-am62p-sk-binman.dtsi
@@@ -83,9 -72,45 +83,46 @@@
  
  		blob-ext {
  			filename = "ti-dm/am62pxx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
 +			optional;
  		};
  	};
+ 	tifsstub-hs {
+ 		filename = "tifsstub.bin_hs";
+ 		ti-secure-rom {
+ 			content = <&tifsstub_hs_cert>;
+ 			core = "secure";
+ 			load = <0x60000>;
+ 			sw-rev = <CONFIG_K3_X509_SWRV>;
+ 			keyfile = "custMpk.pem";
+ 			countersign;
+ 			tifsstub;
+ 		};
+ 		tifsstub_hs_cert: tifsstub-hs-cert.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62px-hs-cert.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 		tifsstub_hs_enc: tifsstub-hs-enc.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62px-hs-enc.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 	};
+ 
+ 	tifsstub-fs {
+ 		filename = "tifsstub.bin_fs";
+ 		tifsstub_fs_cert: tifsstub-fs-cert.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62px-hs-cert.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 		tifsstub_fs_enc: tifsstub-fs-enc.bin {
+ 			filename = "ti-sysfw/ti-fs-stub-firmware-am62px-hs-enc.bin";
+ 			type = "blob-ext";
+ 			optional;
+ 		};
+ 
+ 	};
  
  	ti-spl {
  		insert-template = <&ti_spl_template>;