From: Mike Frysinger <vapier@gentoo.org>
Date: Sat, 4 Apr 2009 12:40:13 +0000 (-0400)
Subject: Blackfin: add check for anomaly 05000362
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=8ef929afa43c77c9573caa57c6e17a97a33775c0;p=u-boot.git

Blackfin: add check for anomaly 05000362

DESCRIPTION:
The column address width settings for banks 2 and 3 are misconnected in
the SDRAM controller.  Accesses to bank 2 will result in an error if the
Column Address Width for bank 3 (EB3CAW ) is not set to be the same as
that of bank 2.

WORKAROUND:
If using bank 2, make sure that banks 2 and 3 have the same column address
width settings in the EBIU_SDBCTL register.  This must be the case
regardless of whether or not bank 3 is enabled.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---

diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c
index 062cbb80b8..aba00e0fb9 100644
--- a/cpu/blackfin/initcode.c
+++ b/cpu/blackfin/initcode.c
@@ -246,6 +246,15 @@ static inline void serial_putc(char c)
 #endif
 #endif
 
+/* Conflicting Column Address Widths Causes SDRAM Errors:
+ * EB2CAW and EB3CAW must be the same
+ */
+#if ANOMALY_05000362
+# if ((CONFIG_EBIU_SDBCTL_VAL & 0x30000000) >> 8) != (CONFIG_EBIU_SDBCTL_VAL & 0x00300000)
+#  error "Anomaly 05000362: EB2CAW and EB3CAW must be the same"
+# endif
+#endif
+
 BOOTROM_CALLED_FUNC_ATTR
 void initcode(ADI_BOOT_DATA *bootstruct)
 {