From: Piotr Wilczek
Date: Fri, 7 Mar 2014 13:59:43 +0000 (+0100)
Subject: arm:exynos: add common DTS file for exynos 4
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=8e5e1e6a92acfa465d993ab099ca1c54c4cadc8d;p=u-boot.git
arm:exynos: add common DTS file for exynos 4
This patch adds common dtsi file and config header for all
Exynos 4 based boards.
Patch additionaly adds board specific (weak) functions for
board_early_init_f and board_power_init functions.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
Signed-off-by: Minkyu Kang
---
diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi
new file mode 100644
index 0000000000..71dc7ebf4a
--- /dev/null
+++ b/arch/arm/dts/exynos4.dtsi
@@ -0,0 +1,138 @@
+/*
+ * Samsung's Exynos4 SoC common device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ serial@13800000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13800000 0x3c>;
+ id = <0>;
+ };
+
+ serial@13810000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13810000 0x3c>;
+ id = <1>;
+ };
+
+ serial@13820000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13820000 0x3c>;
+ id = <2>;
+ };
+
+ serial@13830000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13830000 0x3c>;
+ id = <3>;
+ };
+
+ serial@13840000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13840000 0x3c>;
+ id = <4>;
+ };
+
+ i2c@13860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <0 0 0>;
+ };
+
+ i2c@13870000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <1 1 0>;
+ };
+
+ i2c@13880000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <2 2 0>;
+ };
+
+ i2c@13890000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <3 3 0>;
+ };
+
+ i2c@138a0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <4 4 0>;
+ };
+
+ i2c@138b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <5 5 0>;
+ };
+
+ i2c@138c0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <6 6 0>;
+ };
+
+ i2c@138d0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <7 7 0>;
+ };
+
+ sdhci@12510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos-mmc";
+ reg = <0x12510000 0x1000>;
+ interrupts = <0 75 0>;
+ };
+
+ sdhci@12520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos-mmc";
+ reg = <0x12520000 0x1000>;
+ interrupts = <0 76 0>;
+ };
+
+ sdhci@12530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos-mmc";
+ reg = <0x12530000 0x1000>;
+ interrupts = <0 77 0>;
+ };
+
+ sdhci@12540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos-mmc";
+ reg = <0x12540000 0x1000>;
+ interrupts = <0 78 0>;
+ };
+
+ gpio: gpio {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
diff --git a/arch/arm/include/asm/arch-exynos/board.h b/arch/arm/include/asm/arch-exynos/board.h
index 243fb12b76..1b1cd0dd9e 100644
--- a/arch/arm/include/asm/arch-exynos/board.h
+++ b/arch/arm/include/asm/arch-exynos/board.h
@@ -14,4 +14,16 @@
*/
int exynos_init(void);
+/*
+ * Exynos board specific changes for
+ * board_early_init_f
+ */
+int exynos_early_init_f(void);
+
+/*
+ * Exynos board specific changes for
+ * board_power_init
+ */
+int exynos_power_init(void);
+
#endif /* EXYNOS_BOARD_H */
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index f8562b215f..cf78d36c95 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -33,6 +33,20 @@ struct local_info {
static struct local_info local;
+int __exynos_early_init_f(void)
+{
+ return 0;
+}
+int exynos_early_init_f(void)
+ __attribute__((weak, alias("__exynos_early_init_f")));
+
+int __exynos_power_init(void)
+{
+ return 0;
+}
+int exynos_power_init(void)
+ __attribute__((weak, alias("__exynos_power_init")));
+
#if defined CONFIG_EXYNOS_TMU
/* Boot Time Thermal Analysis for SoC temperature threshold breach */
static void boot_temp_check(void)
@@ -140,7 +154,7 @@ int board_early_init_f(void)
board_i2c_init(gd->fdt_blob);
#endif
- return err;
+ return exynos_early_init_f();
}
#endif
@@ -284,7 +298,7 @@ int power_init_board(void)
ret = max77686_init();
#endif
- return ret;
+ return exynos_power_init();
}
#endif
diff --git a/include/configs/exynos4-dt.h b/include/configs/exynos4-dt.h
new file mode 100644
index 0000000000..2040bf7784
--- /dev/null
+++ b/include/configs/exynos4-dt.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG EXYNOS5 board.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* High Level Configuration Options */
+#define CONFIG_SAMSUNG /* in a SAMSUNG core */
+#define CONFIG_S5P /* S5P Family */
+#define CONFIG_EXYNOS4 /* which is in a Exynos4 Family */
+
+#include /* get chip and board defs */
+
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_COMMON
+
+/* Enable fdt support */
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
+#define CONFIG_SYS_CACHELINE_SIZE 32
+
+/* input clock of PLL: EXYNOS4 boards have 24MHz input clock */
+#define CONFIG_SYS_CLK_FREQ 24000000
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_EDITING
+
+#include
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_S5P_SDHCI
+#define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
+#define CONFIG_MMC_DEFAULT_DEV 0
+
+/* PWM */
+#define CONFIG_PWM
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Command definition*/
+#include
+
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MISC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_XIMG
+#undef CONFIG_CMD_CACHE
+#undef CONFIG_CMD_ONENAND
+#undef CONFIG_CMD_MTDPARTS
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_GPT
+#define CONFIG_CMD_PMIC
+#define CONFIG_CMD_SETEXPR
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* FAT */
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
+/* EXT4 */
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+
+/* TIZEN THOR downloader support */
+#define CONFIG_CMD_THOR_DOWNLOAD
+#define CONFIG_THOR_FUNCTION
+
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
+#define DFU_DEFAULT_POLL_TIMEOUT 300
+
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
+#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
+#define CONFIG_G_DNL_MANUFACTURER "Samsung"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_PART
+#define CONFIG_PARTITION_UUIDS
+
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_USB_CABLE_CHECK
+
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define CONFIG_USB_GADGET_MASS_STORAGE
+
+/* Enable devicetree support */
+#define CONFIG_OF_LIBFDT
+
+#endif /* __CONFIG_H */