From: stroese Date: Thu, 16 Sep 2004 12:34:51 +0000 (+0000) Subject: Update AR405 board. X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=8b1ccd8693abb63537c97b71a3eebefaeefeaf6d;p=u-boot.git Update AR405 board. --- diff --git a/board/esd/ar405/Makefile b/board/esd/ar405/Makefile index f5bda5519a..a60495a59a 100644 --- a/board/esd/ar405/Makefile +++ b/board/esd/ar405/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS = $(BOARD).o flash.o +OBJS = $(BOARD).o flash.o ../common/misc.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c index 6535a19d7f..979eb3bf57 100644 --- a/board/esd/ar405/ar405.c +++ b/board/esd/ar405/ar405.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2001 + * (C) Copyright 2001-2004 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com * * See file CREDITS for list of people who contributed to this @@ -28,6 +28,7 @@ /*cmd_boot.c*/ extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); +extern void lxt971_no_sleep(void); /* ------------------------------------------------------------------------- */ @@ -40,6 +41,10 @@ const unsigned char fpgadata[] = { #include "fpgadata.c" }; +const unsigned char fpgadata_xl30[] = { +#include "fpgadata_xl30.c" +}; + /* * include common fpga code (for esd boards) */ @@ -64,45 +69,52 @@ int board_early_init_f (void) /* * Boot onboard FPGA */ + /* first try 40er image */ + gd->board_type = 40; status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata)); if (status != 0) { - /* booting FPGA failed */ + /* try xl30er image */ + gd->board_type = 30; + status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30)); + if (status != 0) { + /* booting FPGA failed */ #ifndef FPGA_DEBUG - /* set up serial port with default baudrate */ - (void) get_clocks (); - gd->baudrate = CONFIG_BAUDRATE; - serial_init (); - console_init_f (); + /* set up serial port with default baudrate */ + (void) get_clocks (); + gd->baudrate = CONFIG_BAUDRATE; + serial_init (); + console_init_f (); #endif - printf ("\nFPGA: Booting failed "); - switch (status) { - case ERROR_FPGA_PRG_INIT_LOW: - printf ("(Timeout: INIT not low after asserting PROGRAM*)\n "); - break; - case ERROR_FPGA_PRG_INIT_HIGH: - printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n "); - break; - case ERROR_FPGA_PRG_DONE: - printf ("(Timeout: DONE not high after programming FPGA)\n "); - break; - } - - /* display infos on fpgaimage */ - index = 15; - for (i = 0; i < 4; i++) { - len = fpgadata[index]; - printf ("FPGA: %s\n", &(fpgadata[index + 1])); - index += len + 3; - } - putc ('\n'); - /* delayed reboot */ - for (i = 20; i > 0; i--) { - printf ("Rebooting in %2d seconds \r", i); - for (index = 0; index < 1000; index++) - udelay (1000); + printf ("\nFPGA: Booting failed "); + switch (status) { + case ERROR_FPGA_PRG_INIT_LOW: + printf ("(Timeout: INIT not low after asserting PROGRAM*)\n "); + break; + case ERROR_FPGA_PRG_INIT_HIGH: + printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n "); + break; + case ERROR_FPGA_PRG_DONE: + printf ("(Timeout: DONE not high after programming FPGA)\n "); + break; + } + + /* display infos on fpgaimage */ + index = 15; + for (i = 0; i < 4; i++) { + len = fpgadata[index]; + printf ("FPGA: %s\n", &(fpgadata[index + 1])); + index += len + 3; + } + putc ('\n'); + /* delayed reboot */ + for (i = 20; i > 0; i--) { + printf ("Rebooting in %2d seconds \r", i); + for (index = 0; index < 1000; index++) + udelay (1000); + } + putc ('\n'); + do_reset (NULL, 0, 0, NULL); } - putc ('\n'); - do_reset (NULL, 0, 0, NULL); } /* @@ -139,32 +151,44 @@ int board_early_init_f (void) int checkboard (void) { + DECLARE_GLOBAL_DATA_PTR; + int index; int len; unsigned char str[64]; int i = getenv_r ("serial#", str, sizeof (str)); + const unsigned char *fpga; puts ("Board: "); - if (!i || strncmp (str, "AR405", 5)) { - puts ("### No HW ID - assuming AR405\n"); - return (0); + if (i == -1) { + puts ("### No HW ID - assuming AR405"); + } else { + puts(str); } - puts (str); - puts ("\nFPGA: "); /* display infos on fpgaimage */ + if (gd->board_type == 30) { + fpga = fpgadata_xl30; + } else { + fpga = fpgadata; + } index = 15; for (i = 0; i < 4; i++) { - len = fpgadata[index]; - printf ("%s ", &(fpgadata[index + 1])); + len = fpga[index]; + printf ("%s ", &(fpga[index + 1])); index += len + 3; } putc ('\n'); + /* + * Disable sleep mode in LXT971 + */ + lxt971_no_sleep(); + return 0; } diff --git a/board/esd/ar405/config.mk b/board/esd/ar405/config.mk index b229ec0cb8..3e8baf6563 100644 --- a/board/esd/ar405/config.mk +++ b/board/esd/ar405/config.mk @@ -26,4 +26,5 @@ # #TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0xFFFD0000 +#TEXT_BASE = 0xFFFD0000 +TEXT_BASE = 0xFFFC0000 diff --git a/board/esd/ar405/flash.c b/board/esd/ar405/flash.c index a651b6f926..89af1190a8 100644 --- a/board/esd/ar405/flash.c +++ b/board/esd/ar405/flash.c @@ -33,18 +33,19 @@ /*----------------------------------------------------------------------- * Functions */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info); -static void flash_get_offsets (ulong base, flash_info_t *info); +static ulong flash_get_size (vu_long * addr, flash_info_t * info); +static void flash_get_offsets (ulong base, flash_info_t * info); /*----------------------------------------------------------------------- */ unsigned long flash_init (void) { - unsigned long size_b0, size_b1; + unsigned long size_b0; int i; uint pbcr; - unsigned long base_b0, base_b1; + unsigned long base_b0; + int size_val = 0; /* Init: no FLASHes known */ for (i=0; i @@ -92,8 +101,12 @@ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_DEVICE_NULLDEV 1 /* include nulldev device */ + #define CFG_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/ +#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ + #define CFG_MEMTEST_START 0x0400000 /* memtest works on */ #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ @@ -143,9 +156,9 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_FLASH_BASE 0xFFFD0000 +#define CFG_FLASH_BASE 0xFFFC0000 #define CFG_MONITOR_BASE CFG_FLASH_BASE -#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* @@ -157,7 +170,7 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ @@ -185,7 +198,8 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CFG_DCACHE_SIZE 8192 /* For IBM 405 CPUs */ +#define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */ + /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ @@ -197,8 +211,7 @@ * BR0/1 and OR0/1 (FLASH) */ -#define FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank #0 */ -#define FLASH_BASE1_PRELIM 0xFFC00000 /* FLASH bank #1 */ +#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */ /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup