From: Egli, Samuel <samuel.egli@siemens.com>
Date: Thu, 24 Apr 2014 15:57:53 +0000 (+0200)
Subject: siemens: update DDR3 parameters for dxr2
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=823b2c4ce4b54b658b45055bbc4c79f15789d48c;p=u-boot.git

siemens: update DDR3 parameters for dxr2

* add parameters for factory and print them at start up to
   facilitate control of right DDR3 settings in EEPROM.

 * cosmetic changes in a couple of printfs

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
---

diff --git a/board/siemens/dxr2/board.c b/board/siemens/dxr2/board.c
index 38ac93d795..e9f157a9ea 100644
--- a/board/siemens/dxr2/board.c
+++ b/board/siemens/dxr2/board.c
@@ -38,12 +38,26 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_SPL_BUILD
 static struct dxr2_baseboard_id __attribute__((section(".data"))) settings;
-/* @303MHz-i0 */
+
+#if DDR_PLL_FREQ == 303
+/* Default@303MHz-i0 */
+const struct ddr3_data ddr3_default = {
+	0x33524444, 0x56312e35, 0x0080, 0x0000, 0x003A, 0x003F, 0x009F,
+	0x0079, 0x0888A39B, 0x26247FDA, 0x501F821F, 0x00100206, 0x61A44A32,
+	0x0000093B, 0x0000014A,
+	"default name @303MHz           \0",
+	"default marking                \0",
+};
+#elif DDR_PLL_FREQ == 400
+/* Default@400MHz-i0 */
 const struct ddr3_data ddr3_default = {
-	0x33524444, 0x56312e34, 0x0080, 0x0000, 0x0038, 0x003E, 0x00A4,
-	0x0075, 0x0888A39B, 0x26247FDA, 0x501F821F, 0x00100206, 0x61A44A32,
+	0x33524444, 0x56312e35, 0x0080, 0x0000, 0x0039, 0x0046, 0x00ab,
+	0x0080, 0x0AAAA4DB, 0x26307FDA, 0x501F821F, 0x00100207, 0x61A45232,
 	0x00000618, 0x0000014A,
+	"default name @400MHz           \0",
+	"default marking                \0",
 };
+#endif
 
 static void set_default_ddr3_timings(void)
 {
@@ -53,8 +67,12 @@ static void set_default_ddr3_timings(void)
 
 static void print_ddr3_timings(void)
 {
-	printf("\n\nDDR3 Timing parameters:\n");
-	printf("Diff     Eeprom  Default\n");
+	printf("\nDDR3\n");
+	printf("clock:\t\t%d MHz\n", DDR_PLL_FREQ);
+	printf("device:\t\t%s\n", settings.ddr3.manu_name);
+	printf("marking:\t%s\n", settings.ddr3.manu_marking);
+	printf("timing parameters\n");
+	printf("diff\teeprom\tdefault\n");
 	PRINTARGS(magic);
 	PRINTARGS(version);
 	PRINTARGS(ddr3_sratio);
@@ -78,9 +96,9 @@ static void print_ddr3_timings(void)
 
 static void print_chip_data(void)
 {
-	printf("\n");
-	printf("Device: '%s'\n", settings.chip.sdevname);
-	printf("HW version: '%s'\n", settings.chip.shwver);
+	printf("\nCPU BOARD\n");
+	printf("device: \t'%s'\n", settings.chip.sdevname);
+	printf("hw version: \t'%s'\n", settings.chip.shwver);
 }
 #endif /* CONFIG_SPL_BUILD */
 
@@ -112,19 +130,18 @@ static int read_eeprom(void)
 		printf("Using DDR3 settings from EEPROM\n");
 	} else {
 		if (ddr3_default.magic != settings.ddr3.magic)
-			printf("Error: No valid DDR3 data in eeprom.\n");
+			printf("Warning: No valid DDR3 data in eeprom.\n");
 		if (ddr3_default.version != settings.ddr3.version)
-			printf("Error: DDR3 data version does not match.\n");
+			printf("Warning: DDR3 data version does not match.\n");
 
 		printf("Using default settings\n");
 		set_default_ddr3_timings();
 	}
 
 	if (MAGIC_CHIP == settings.chip.magic) {
-		printf("Valid chip data in eeprom\n");
 		print_chip_data();
 	} else {
-		printf("Error: No chip data in eeprom\n");
+		printf("Warning: No chip data in eeprom\n");
 	}
 
 	print_ddr3_timings();
diff --git a/board/siemens/dxr2/board.h b/board/siemens/dxr2/board.h
index abf5432329..a59ffb0109 100644
--- a/board/siemens/dxr2/board.h
+++ b/board/siemens/dxr2/board.h
@@ -22,24 +22,26 @@
 #define MAGIC_CHIP	0x50494843
 
 /* Automatic generated definition */
-/* Wed, 18 Sep 2013 18:58:27 +0200 */
-/* From file: draco/ddr3-data-micron-v2.txt */
+/* Wed, 16 Apr 2014 16:50:41 +0200 */
+/* From file: draco/ddr3-data-universal-default@303MHz-i0-ES3.txt */
 struct ddr3_data {
 	unsigned int magic;			/* 0x33524444 */
-	unsigned int version;			/* 0x56312e34 */
-	unsigned short int ddr3_sratio;		/* 0x0100 */
-	unsigned short int iclkout;		/* 0x0001 */
+	unsigned int version;			/* 0x56312e35 */
+	unsigned short int ddr3_sratio;		/* 0x0080 */
+	unsigned short int iclkout;		/* 0x0000 */
 	unsigned short int dt0rdsratio0;	/* 0x003A */
-	unsigned short int dt0wdsratio0;	/* 0x008A */
-	unsigned short int dt0fwsratio0;	/* 0x010B */
-	unsigned short int dt0wrsratio0;	/* 0x00C4 */
+	unsigned short int dt0wdsratio0;	/* 0x003F */
+	unsigned short int dt0fwsratio0;	/* 0x009F */
+	unsigned short int dt0wrsratio0;	/* 0x0079 */
 	unsigned int sdram_tim1;		/* 0x0888A39B */
 	unsigned int sdram_tim2;		/* 0x26247FDA */
 	unsigned int sdram_tim3;		/* 0x501F821F */
 	unsigned int emif_ddr_phy_ctlr_1;	/* 0x00100206 */
-	unsigned int sdram_config;		/* 0x61C04AB2 */
-	unsigned int ref_ctrl;			/* 0x00000618 */
-	unsigned int ioctr_val;			/* 0x0000018B */
+	unsigned int sdram_config;		/* 0x61A44A32 */
+	unsigned int ref_ctrl;			/* 0x0000093B */
+	unsigned int ioctr_val;			/* 0x0000014A */
+	char manu_name[32];			/* "default@303MHz \0" */
+	char manu_marking[32];			/* "default \0" */
 };
 
 struct chip_data {