From: Grzegorz Szymaszek <gszymaszek@short.pl>
Date: Wed, 2 Jun 2021 17:09:13 +0000 (+0200)
Subject: arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=7db3307848f2d4734861fda45320345e688ccdac;p=u-boot.git

arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode

Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
corresponding Linux kernel device tree.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
---

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 583812f137..1510a5b364 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -274,6 +274,7 @@
 	bus-width = <8>;
 	vmmc-supply = <&v3v3>;
 	vqmmc-supply = <&vdd>;
+	mmc-ddr-3_3v;
 	status = "okay";
 };