From: Rick Chen <rick@andestech.com>
Date: Wed, 30 May 2018 08:12:19 +0000 (+0800)
Subject: travis.yml: Support RISC-V 64-bit
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=6ffea11b89099d72029bc644f7664736ee7ca667;p=u-boot.git

travis.yml: Support RISC-V 64-bit

Fix riscv: ax25-ae350 build fail problem
https://travis-ci.org/trini/u-boot/jobs/385147373

...
Building current source for 1 boards (1 thread, 2 jobs per thread)
     riscv:  +   ax25-ae350
+arch/riscv/cpu/ax25/start.S: Assembler messages:
+arch/riscv/cpu/ax25/start.S:48: Error: unrecognized opcode `sd a2,0(t0)'
+arch/riscv/cpu/ax25/start.S:112: Error: unrecognized opcode `ld t5,0(t0)'
...

After apply the commit
configs: ax25-ae350: Set 64-bit as default configuration

Toolchain shall be also setuped with 64-bit in .travis.yml.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Reviewed-by: Chih-Mao Chen <cmchen@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
---

diff --git a/.travis.yml b/.travis.yml
index 937f028d6d..7e90bc9b36 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -87,9 +87,9 @@ before_script:
     fi
   - if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi
   - if [[ "${TOOLCHAIN}" == "riscv" ]]; then
-        wget https://github.com/PkmX/riscv-prebuilt-toolchains/releases/download/20180111/riscv32-unknown-elf-toolchain.tar.gz &&
-        tar -C /tmp -xf riscv32-unknown-elf-toolchain.tar.gz &&
-        echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv32-unknown-elf/bin/riscv32-unknown-elf-" >> ~/.buildman;
+        wget https://github.com/andestech/prebuilt/releases/download/20180530/riscv64-unknown-linux-gnu.tar.gz &&
+        tar -C /tmp -xf riscv64-unknown-linux-gnu.tar.gz &&
+        echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv64-unknown-linux-gnu/bin/riscv64-unknown-linux-gnu-" >> ~/.buildman;
     fi
   - if [[ "${QEMU_TARGET}" != "" ]]; then
        git clone git://git.qemu.org/qemu.git /tmp/qemu;