From: Tom Rini <trini@konsulko.com>
Date: Thu, 30 Apr 2020 15:31:33 +0000 (-0400)
Subject: Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u... 
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=6d7dacf726ca043a3f5487549bbfa506c990c813;p=u-boot.git

Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2020.07-rc2

mmc:
- Fix dt property handling via generic function

clk:
- Fix versal watchdog clock setting

nand:
- Fix zynq nand command comparison

xilinx:
- Enable ubifs
- Sync board_late_init configurations with initrd_high setup
- Make custom distro boot more verbose

zynq:
- Kconfig alignments
- Fix nand cse configuration

zynqmp:
- Fix zcu104 low level qspi configuration
- Small DT updates

Signed-off-by: Tom Rini <trini@konsulko.com>
---

6d7dacf726ca043a3f5487549bbfa506c990c813
diff --cc configs/zynq_cse_nand_defconfig
index 19491c9e47,80a427d905..6a01da2e4e
--- a/configs/zynq_cse_nand_defconfig
+++ b/configs/zynq_cse_nand_defconfig
@@@ -4,8 -4,8 +4,8 @@@ CONFIG_SYS_ICACHE_OFF=
  CONFIG_SYS_DCACHE_OFF=y
  CONFIG_ARCH_ZYNQ=y
  CONFIG_SYS_TEXT_BASE=0x100000
 -CONFIG_SYS_MALLOC_LEN=0x8000
  CONFIG_ENV_SIZE=0x190
- CONFIG_SYS_MALLOC_LEN=0x1000
++CONFIG_SYS_MALLOC_LEN=0x8000
  CONFIG_SPL_STACK_R_ADDR=0x200000
  CONFIG_SPL=y
  CONFIG_SYS_CUSTOM_LDSCRIPT=y