From: Tom Rini <trini@konsulko.com>
Date: Wed, 15 Jun 2022 16:03:44 +0000 (-0400)
Subject: net: designware: Rename CONFIG_DW_GMAC_DEFAULT_DMA_PBL to GMAC_DEFAULT_DMA_PBL
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=69a2bb63215f61cca52ecf037df18999edbf2061;p=u-boot.git

net: designware: Rename CONFIG_DW_GMAC_DEFAULT_DMA_PBL to GMAC_DEFAULT_DMA_PBL

This value is always used at the default, rename it for now.  This
likely should come from the device tree if non-default, moving forward.

Signed-off-by: Tom Rini <trini@konsulko.com>
---

diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index ddc3d4f150..3793d55098 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -85,10 +85,8 @@ struct eth_dma_regs {
 
 #define DW_DMA_BASE_OFFSET	(0x1000)
 
-/* Default DMA Burst length */
-#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL
-#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8
-#endif
+/* DMA Burst length */
+#define GMAC_DEFAULT_DMA_PBL	8
 
 /* Bus mode register definitions */
 #define FIXEDBURST		(1 << 16)
@@ -96,7 +94,7 @@ struct eth_dma_regs {
 #define PRIORXTX_31		(2 << 14)
 #define PRIORXTX_21		(1 << 14)
 #define PRIORXTX_11		(0 << 14)
-#define DMA_PBL			(CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8)
+#define DMA_PBL			(GMAC_DEFAULT_DMA_PBL << 8)
 #define RXHIGHPRIO		(1 << 1)
 #define DMAMAC_SRST		(1 << 0)
 
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 73376f16b4..df05ee4892 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -20,8 +20,6 @@
 
 #define CONFIG_SYS_MAX_FLASH_SECT	8
 
-#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL	(8)
-
 #define CONFIG_SYS_HZ_CLOCK		1000000	/* Timer is clocked at 1MHz */
 
 #define BOOT_TARGET_DEVICES(func) \