From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Mon, 22 Oct 2007 15:58:19 +0000 (+0400)
Subject: MPC8568E-MDS: set up QE pario for UART1
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=64d4bcb087c2ece1c4d0de8efe85e0075e5b1594;p=u-boot.git

MPC8568E-MDS: set up QE pario for UART1

To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
be set up appropriately.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---

diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index 1aaecf3d03..3c3726b49c 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -87,6 +87,13 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
 	{1, 31, 2, 0, 3}, /* GTX125 */
 	{4,  6, 3, 0, 2}, /* MDIO */
 	{4,  5, 1, 0, 2}, /* MDC */
+
+	/* UART1 */
+	{2, 0, 1, 0, 2}, /* UART_SOUT1 */
+	{2, 1, 1, 0, 2}, /* UART_RTS1 */
+	{2, 2, 2, 0, 2}, /* UART_CTS1 */
+	{2, 3, 2, 0, 2}, /* UART_SIN1 */
+
 	{0,  0, 0, 0, QE_IOP_TAB_END}, /* END of table */
 };