From: Michal Simek <michal.simek@xilinx.com>
Date: Wed, 15 Jun 2022 09:56:55 +0000 (+0200)
Subject: arm64: zynqmp: Update tps53681 i2c address
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=5f5979f430861c2a41c28cc2b3cc96f84021493f;p=u-boot.git

arm64: zynqmp: Update tps53681 i2c address

TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address
is 7bit where c0h is 1100000 which is 0x60.

This will fix issues reported by make dtbs that 0xc0 is above 7bit regular
i2c address range.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2f50c1cd258f6b05deb2a6a9af7fa92952f3f8cb.1655287013.git.michal.simek@amd.com
---

diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
index ee530ba3e1..e00428351c 100644
--- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
@@ -260,9 +260,9 @@
 				reg = <0x45>;
 				shunt-resistor = <5000>;
 			};
-			tps53681@c0 { /* u53 - FIXME name - don't know what it does - also vcc_io_soc */
+			tps53681@60 { /* u53 - 0xc0 - FIXME name - don't know what it does - also vcc_io_soc */
 				compatible = "ti,tps53681", "ti,tps53679";
-				reg = <0xc0>;
+				reg = <0x60>;
 			};
 		};
 		i2c@3 { /* fmc1 via JA2G */
diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
index 7b3722f080..1fa023ffb1 100644
--- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
@@ -247,9 +247,9 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			reg_vccint: tps53681@c0 { /* u69 */
+			reg_vccint: tps53681@60 { /* u69 - 0xc0 */
 				compatible = "ti,tps53681", "ti,tps53679";
-				reg = <0xc0>;
+				reg = <0x60>;
 			};
 			reg_vcc_pmc: tps544@7 { /* u80 */
 				compatible = "ti,tps544b25";
diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
index 11b2a58a0f..85790551d0 100644
--- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
@@ -239,9 +239,9 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			reg_vccint: tps53681@c0 { /* u69 */
+			reg_vccint: tps53681@60 { /* u69 - 0xc0 */
 				compatible = "ti,tps53681", "ti,tps53679";
-				reg = <0xc0>;
+				reg = <0x60>;
 			};
 			reg_vcc_pmc: tps544@7 { /* u80 */
 				compatible = "ti,tps544b25";
diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
index db199c467b..21ef1a5e82 100644
--- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
@@ -239,9 +239,9 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			reg_vccint: tps53681@c0 { /* u69 */
+			reg_vccint: tps53681@60 { /* u69 - 0xc0 */
 				compatible = "ti,tps53681", "ti,tps53679";
-				reg = <0xc0>;
+				reg = <0x60>;
 			};
 			reg_vcc_pmc: tps544@7 { /* u80 */
 				compatible = "ti,tps544b25";