From: Marek Vasut <marex@denx.de>
Date: Wed, 10 Jul 2013 01:16:38 +0000 (+0200)
Subject: usb: mv_udc: Add cacheline length check
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=5804b8859a3317d3deb1e6adafc2a2604d276f1c;p=u-boot.git

usb: mv_udc: Add cacheline length check

Check the length of system cacheline at compile-time and fail
if the system uses too long cachelines.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---

diff --git a/drivers/usb/gadget/mv_udc.c b/drivers/usb/gadget/mv_udc.c
index bbf4418a2e..1ead2f2459 100644
--- a/drivers/usb/gadget/mv_udc.c
+++ b/drivers/usb/gadget/mv_udc.c
@@ -21,6 +21,16 @@
 #error This driver only supports one single controller.
 #endif
 
+/*
+ * Check if the system has too long cachelines. If the cachelines are
+ * longer then 128b, the driver will not be able flush/invalidate data
+ * cache over separate QH entries. We use 128b because one QH entry is
+ * 64b long and there are always two QH list entries for each endpoint.
+ */
+#if ARCH_DMA_MINALIGN > 128
+#error This driver can not work on systems with caches longer than 128b
+#endif
+
 #ifndef DEBUG
 #define DBG(x...) do {} while (0)
 #else