From: Shinya Kuribayashi <skuribay@pobox.com>
Date: Sat, 5 Feb 2011 09:33:36 +0000 (+0900)
Subject: MIPS: Move Inca-IP targets to boards.cfg
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=536884f915b1cdac69f0fb434ce3781c2ae31499;p=u-boot.git

MIPS: Move Inca-IP targets to boards.cfg

At the same time, fix up CPU_CLOCK_RATE to have the CONFIG_ prefix to
work with boards.cfg.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
---

diff --git a/Makefile b/Makefile
index 9e6cf25470..3fe0596213 100644
--- a/Makefile
+++ b/Makefile
@@ -1098,19 +1098,6 @@ smdk6400_config	:	unconfig
 ## MIPS32 4Kc
 #########################################################################
 
-incaip_100MHz_config	\
-incaip_133MHz_config	\
-incaip_150MHz_config	\
-incaip_config: unconfig
-	@mkdir -p $(obj)include
-	@[ -z "$(findstring _100MHz,$@)" ] || \
-		echo "#define CPU_CLOCK_RATE 100000000" >>$(obj)include/config.h
-	@[ -z "$(findstring _133MHz,$@)" ] || \
-		echo "#define CPU_CLOCK_RATE 133000000" >>$(obj)include/config.h
-	@[ -z "$(findstring _150MHz,$@)" ] || \
-		echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h
-	@$(MKCONFIG) -n $@ -a incaip mips mips incaip
-
 vct_premium_config		\
 vct_premium_small_config	\
 vct_premium_onenand_config	\
diff --git a/board/incaip/lowlevel_init.S b/board/incaip/lowlevel_init.S
index fe525ec70e..b765795686 100644
--- a/board/incaip/lowlevel_init.S
+++ b/board/incaip/lowlevel_init.S
@@ -283,7 +283,7 @@ lowlevel_init:
 
 	/* EBU, CGU and SDRAM Initialization.
 	 */
-	li	a0, CPU_CLOCK_RATE
+	li	a0, CONFIG_CPU_CLOCK_RATE
 	move	t0, ra
 
 	/* We rely on the fact that neither ebu_init() nor cgu_init() nor sdram_init()
diff --git a/boards.cfg b/boards.cfg
index cb67d2a0fb..d3edc9f81a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -219,6 +219,10 @@ dbau1500                     mips        mips        dbau1x00            -
 dbau1550                     mips        mips        dbau1x00            -              -           dbau1x00:DBAU1550
 dbau1550_el                  mips        mips        dbau1x00            -              -           dbau1x00:DBAU1550
 gth2                         mips        mips
+incaip                       mips        mips
+incaip_100MHz                mips        mips        incaip              -              -           incaip:CPU_CLOCK_RATE=100000000
+incaip_133MHz                mips        mips        incaip              -              -           incaip:CPU_CLOCK_RATE=133000000
+incaip_150MHz                mips        mips        incaip              -              -           incaip:CPU_CLOCK_RATE=150000000
 pb1000                       mips        mips        pb1x00              -              -           pb1x00:PB1000
 purple                       mips        mips
 qemu_mips                    mips        mips        qemu-mips           -              -           qemu-mips
diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index b7ba6f4fbb..f2950e8d5b 100644
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -31,9 +31,12 @@
 #define CONFIG_MIPS32		1	/* MIPS 4Kc CPU core	*/
 #define CONFIG_INCA_IP		1	/* on a INCA-IP Board	*/
 
-#ifndef	CPU_CLOCK_RATE
-/* allowed values: 100000000, 133000000, and 150000000 */
-#define CPU_CLOCK_RATE	150000000	/* default: 150 MHz clock for the MIPS core */
+/*
+ * Clock for the MIPS core (MHz)
+ * allowed values: 100000000, 133000000, and 150000000 (default)
+ */
+#ifndef CONFIG_CPU_CLOCK_RATE
+#define CONFIG_CPU_CLOCK_RATE	150000000
 #endif
 
 #define INFINEON_EBU_BOOTCFG	0x40C4	/* CMULT = 8 */