From: Marek Vasut <marex@denx.de>
Date: Sat, 26 Feb 2022 03:37:41 +0000 (+0100)
Subject: ARM: imx: imx8m: Add 933 MHz PLL settings
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=4ca42af8f5b6be986aa9c6b6b87b96a169eb9e77;p=u-boot.git

ARM: imx: imx8m: Add 933 MHz PLL settings

Add settings for operating PLL at 933 MHz. This setting is useful in
case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
---

diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index 76132defc2..4db55f8608 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -48,6 +48,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
 #ifdef CONFIG_SPL_BUILD
 static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = {
 	PLL_1443X_RATE(1000000000U, 250, 3, 1, 0),
+	PLL_1443X_RATE(933000000U, 311, 4, 1, 0),
 	PLL_1443X_RATE(800000000U, 300, 9, 0, 0),
 	PLL_1443X_RATE(750000000U, 250, 8, 0, 0),
 	PLL_1443X_RATE(650000000U, 325, 3, 2, 0),