From: Shengyu Qu Date: Wed, 9 Aug 2023 13:11:33 +0000 (+0800) Subject: riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=47ed15125cccd98e041cdff3b6bbe675a2418ec2;p=u-boot.git riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE. Signed-off-by: Bo Gan Signed-off-by: Shengyu Qu Reviewed-by: Leo Yu-Chi Liang --- diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig index c1d3e6ada2..8469ee7de5 100644 --- a/arch/riscv/cpu/jh7110/Kconfig +++ b/arch/riscv/cpu/jh7110/Kconfig @@ -14,6 +14,7 @@ config STARFIVE_JH7110 select SPL_RAM if SPL select SPL_STARFIVE_DDR select SYS_CACHE_SHIFT_6 + select SPL_ZERO_MEM_BEFORE_USE select PINCTRL_STARFIVE_JH7110 imply MMC imply MMC_BROKEN_CD