From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 30 Jul 2015 10:49:14 +0000 (-0700)
Subject: x86: minnowmax: Remove smsc47x superio codes
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=456ee909d63a35daa51b70231c4abffa4709e9f3;p=u-boot.git

x86: minnowmax: Remove smsc47x superio codes

On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated
into the SoC which is enabled by the FSP. Remove the smsc47x superio
initialization codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
---

diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c
index 383cae068b..c4f2c33b87 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -6,12 +6,7 @@
 
 #include <common.h>
 #include <asm/gpio.h>
-#include <asm/ibmpc.h>
-#include <asm/pnp_def.h>
 #include <netdev.h>
-#include <smsc_lpc47m.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, 4)
 
 int arch_early_init_r(void)
 {
@@ -21,13 +16,6 @@ int arch_early_init_r(void)
 	return 0;
 }
 
-int board_early_init_f(void)
-{
-	lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
-
-	return 0;
-}
-
 void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
 {
 	return;
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 4781e792f9..655ce3d422 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -14,11 +14,9 @@
 #include <configs/x86-common.h>
 
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
-#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_ARCH_EARLY_INIT_R
 
 #define CONFIG_X86_SERIAL
-#define CONFIG_SMSC_LPC47M
 
 #define CONFIG_PCI_MEM_BUS		0xd0000000
 #define CONFIG_PCI_MEM_PHYS		CONFIG_PCI_MEM_BUS