From: Simon Glass <sjg@chromium.org>
Date: Sun, 5 Feb 2023 22:40:43 +0000 (-0700)
Subject: Correct SPL uses of SANDBOX_CLK_CCF
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=4051c400c5021b798305499016df1c058e61c209;p=u-boot.git

Correct SPL uses of SANDBOX_CLK_CCF

This converts 12 usages of this option to the non-SPL form, since there is
no SPL_SANDBOX_CLK_CCF defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 7e8e62feee..6ab137a72b 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -81,7 +81,7 @@ static ulong clk_divider_recalc_rate(struct clk *clk)
 	unsigned long parent_rate = clk_get_parent_rate(clk);
 	unsigned int val;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	val = divider->io_divider_val;
 #else
 	val = readl(divider->reg);
@@ -210,7 +210,7 @@ static struct clk *_register_divider(struct device *dev, const char *name,
 	div->width = width;
 	div->flags = clk_divider_flags;
 	div->table = table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	div->io_divider_val = *(u32 *)reg;
 #endif
 
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index aa40daf3d7..a8775c77dc 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -62,7 +62,7 @@ static void clk_gate_endisable(struct clk *clk, int enable)
 		if (set)
 			reg |= BIT(gate->bit_idx);
 	} else {
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 		reg = gate->io_gate_val;
 #else
 		reg = readl(gate->reg);
@@ -96,7 +96,7 @@ int clk_gate_is_enabled(struct clk *clk)
 	struct clk_gate *gate = to_clk_gate(clk);
 	u32 reg;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	reg = gate->io_gate_val;
 #else
 	reg = readl(gate->reg);
@@ -142,7 +142,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
 	gate->reg = reg;
 	gate->bit_idx = bit_idx;
 	gate->flags = clk_gate_flags;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	gate->io_gate_val = *(u32 *)reg;
 #endif
 
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index b49946fbcd..184d426d0b 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -90,7 +90,7 @@ u8 clk_mux_get_parent(struct clk *clk)
 	struct clk_mux *mux = to_clk_mux(clk);
 	u32 val;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	val = mux->io_mux_val;
 #else
 	val = readl(mux->reg);
@@ -137,7 +137,7 @@ static int clk_mux_set_parent(struct clk *clk, struct clk *parent)
 	if (mux->flags & CLK_MUX_HIWORD_MASK) {
 		reg = mux->mask << (mux->shift + 16);
 	} else {
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 		reg = mux->io_mux_val;
 #else
 		reg = readl(mux->reg);
@@ -146,7 +146,7 @@ static int clk_mux_set_parent(struct clk *clk, struct clk *parent)
 	}
 	val = val << mux->shift;
 	reg |= val;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	mux->io_mux_val = reg;
 #else
 	writel(reg, mux->reg);
@@ -194,7 +194,7 @@ struct clk *clk_hw_register_mux_table(struct device *dev, const char *name,
 	mux->mask = mask;
 	mux->flags = clk_mux_flags;
 	mux->table = table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	mux->io_mux_val = *(u32 *)reg;
 #endif
 
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 2d04882d05..b8acacd49e 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -65,7 +65,7 @@ struct clk_mux {
 	 */
 	const char	* const *parent_names;
 	u8		num_parents;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	u32             io_mux_val;
 #endif
 
@@ -93,7 +93,7 @@ struct clk_gate {
 	void __iomem	*reg;
 	u8		bit_idx;
 	u8		flags;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	u32		io_gate_val;
 #endif
 };
@@ -121,7 +121,7 @@ struct clk_divider {
 	u8		width;
 	u8		flags;
 	const struct clk_div_table	*table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	u32             io_divider_val;
 #endif
 };