From: Tom Rini Date: Sat, 25 Jun 2022 15:02:43 +0000 (-0400) Subject: Convert CONFIG_SYS_BOOK3E_HV to Kconfig X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=3dab405b45e5089d42f59d01e3803fab8ac56fcf;p=u-boot.git Convert CONFIG_SYS_BOOK3E_HV to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOK3E_HV Signed-off-by: Tom Rini --- diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index e7003d3b64..f4f5ebfe0c 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1216,6 +1216,10 @@ config SYS_FSL_LBC_CLK_DIV config ENABLE_36BIT_PHYS bool "Enable 36bit physical address space support" +config SYS_BOOK3E_HV + bool "Category E.HV is supported" + depends on BOOKE + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 5063470d85..459b9e6c54 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index a64f8924dd..6ff6a42830 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index f295174da5..a5872faa47 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index e3dd1e93e3..247db8e0fe 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 3e4cb5180e..91ad3ee305 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 66eb6c3f3d..6ca91fe77e 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 87c62be04f..13857b8208 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index d083c256b0..b587d525a2 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index ed6f3de96e..c88a869bc8 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index e77085ae3e..a627475420 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 91aa75d9e1..82371ea989 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 3a48362c3b..be3d388484 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 9aa293dc22..4dcdb391e4 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 6f0d51a7ab..7620f4879a 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index ae5f7b7ba3..68573a5c98 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index ad33aa8fe2..d10799f83c 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 06bb7b7953..22c404e27c 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index f88fb381a2..2f1e9ca46e 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index a0908ac83a..5c30e9fe37 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index bb32ddf8c1..00ea2175a7 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 932a4e1507..c738e9c413 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 0c4e339da7..bc38fa68b2 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 44458015c2..af7df9ee91 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 05e46e6cac..e7ce3631e0 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 1818762ded..a2a2c589d7 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 30d1b85a00..4f35dbd945 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -6,6 +6,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 73c50b9245..b02939f679 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 48ef69cbbb..6caffde6d4 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index a94fd3f42e..4ec70d678c 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 6566226abc..f382288ebb 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 3333ac145a..5837b3d26d 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 5812daad55..ab191c702f 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 563d0b5f31..fff8a26b32 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -12,8 +12,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y -<<<<<<< HEAD -======= +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -22,7 +21,6 @@ CONFIG_VID=y CONFIG_VID_FLS_ENV="t208xrdb_vdd_mv" CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y ->>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 98443438a9..c5ab7af335 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 004f67703f..83f4725009 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 610f3f8969..0c5365217e 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index ca6a741fef..66a9d5dcad 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -12,6 +12,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_T2080RDB_REV_D=y <<<<<<< HEAD ======= diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 3e43f9bb98..639cb80e8e 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y <<<<<<< HEAD ======= diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 9f6457fc3a..6f403619d6 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -12,8 +12,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y -<<<<<<< HEAD -======= +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -22,7 +21,6 @@ CONFIG_VID=y CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y ->>>>>>> Convert CONFIG_PCIE1 et al to Kconfig CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index cd6fb9675b..38d33c20dc 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y # CONFIG_DEEP_SLEEP is not set CONFIG_PCIE1=y CONFIG_KM_DEF_NETDEV="eth2" diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e019c16843..2dc7da6216 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -25,7 +25,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index a519b5a935..159002d1ed 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -14,7 +14,6 @@ #include /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 3a7c643cfc..25d82db0f8 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -53,7 +53,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index eff22c18bb..969e7f728f 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -21,7 +21,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ba9bfdd72f..098125989e 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -16,7 +16,6 @@ #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 12b479f9c7..6ec3c6a8c0 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -34,7 +34,6 @@ #endif /* CONFIG_RAMBOOT_PBL */ /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 2252bf8954..d8ad456881 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -28,7 +28,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ed24733abf..eafdc35c27 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -133,7 +133,6 @@ #define KM_I2C_DEBLOCK_SDA 21 /* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_RESET_VECTOR_ADDRESS 0xebfffffc