From: Inha Song <ideal.song@samsung.com>
Date: Thu, 6 Feb 2014 05:20:10 +0000 (+0900)
Subject: exynos: clock: fixed that cfg is set to wrong value.
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=3cb007a9f298ff632ea37d86441da238f599dfbe;p=u-boot.git

exynos: clock: fixed that cfg is set to wrong value.

This patch fixed that cfg value is set to wrong value.
Because it didn't read the related register.

Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---

diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index 6807ff3c37..61cd8cf425 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -1114,6 +1114,7 @@ void exynos4_set_lcd_clk(void)
 	 * MIPI0_PRE_RATIO	[23:20]
 	 * set fimd ratio
 	 */
+	cfg = readl(&clk->div_lcd0);
 	cfg &= ~(0xf);
 	cfg |= 0x1;
 	writel(cfg, &clk->div_lcd0);
@@ -1176,6 +1177,7 @@ void exynos5_set_lcd_clk(void)
 	 * MIPI0_PRE_RATIO	[23:20]
 	 * set fimd ratio
 	 */
+	cfg = readl(&clk->div_disp1_0);
 	cfg &= ~(0xf);
 	cfg |= 0x0;
 	writel(cfg, &clk->div_disp1_0);
@@ -1236,6 +1238,7 @@ void exynos4_set_mipi_clk(void)
 	 * MIPI0_PRE_RATIO	[23:20]
 	 * set mipi ratio
 	 */
+	cfg = readl(&clk->div_lcd0);
 	cfg &= ~(0xf << 16);
 	cfg |= (0x1 << 16);
 	writel(cfg, &clk->div_lcd0);