From: Chin Liang See <clsee@altera.com>
Date: Tue, 22 Jul 2014 09:28:35 +0000 (-0500)
Subject: socfpga: Fix SOCFPGA build error for Altera dev kit
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=3ab019e1dc39c69ae7fd0e15b080ef6c59cd138f;p=u-boot.git

socfpga: Fix SOCFPGA build error for Altera dev kit

To fix the build error when build for Altera dev kit, not
virtual target. At same time, set the build for Altera dev
kit as default instead virtual target. With that, U-Boot
is booting well and SPL still lack of few drivers.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
---

diff --git a/arch/arm/cpu/armv7/socfpga/clock_manager.c b/arch/arm/cpu/armv7/socfpga/clock_manager.c
index 0228ac8c3b..158501acba 100644
--- a/arch/arm/cpu/armv7/socfpga/clock_manager.c
+++ b/arch/arm/cpu/armv7/socfpga/clock_manager.c
@@ -188,7 +188,6 @@ void cm_basic_init(const cm_config_t *cfg)
 	 * Time starts here
 	 * must wait 7 us from BGPWRDN_SET(0) to VCO_ENABLE_SET(1)
 	 */
-	reset_timer();
 	start = get_timer(0);
 	/* timeout in unit of us as CONFIG_SYS_HZ = 1000*1000 */
 	timeout = 7;
diff --git a/arch/arm/cpu/armv7/socfpga/config.mk b/arch/arm/cpu/armv7/socfpga/config.mk
index 3d18491577..2a99c72aeb 100644
--- a/arch/arm/cpu/armv7/socfpga/config.mk
+++ b/arch/arm/cpu/armv7/socfpga/config.mk
@@ -6,3 +6,6 @@
 ifndef CONFIG_SPL_BUILD
 ALL-y	+= u-boot.img
 endif
+
+# Added for handoff support
+PLATFORM_RELFLAGS += -Iboard/$(VENDOR)/$(BOARD)
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c
index 4bed19d0a7..27efde62cc 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -14,6 +14,8 @@
 #include <spl.h>
 #include <asm/arch/system_manager.h>
 #include <asm/arch/freeze_controller.h>
+#include <asm/arch/clock_manager.h>
+#include <asm/arch/scan_manager.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/include/asm/arch-socfpga/scan_manager.h b/arch/arm/include/asm/arch-socfpga/scan_manager.h
index f9be6211b3..b2686d3cdb 100644
--- a/arch/arm/include/asm/arch-socfpga/scan_manager.h
+++ b/arch/arm/include/asm/arch-socfpga/scan_manager.h
@@ -87,4 +87,6 @@ extern const uint32_t iocsr_scan_chain2_table[
 extern const uint32_t iocsr_scan_chain3_table[
 	((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH / 32) + 1)];
 
+int scan_mgr_configure_iocsr(void);
+
 #endif /* _SCAN_MANAGER_H_ */
diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile
index de339ec7f7..44baa0068c 100644
--- a/board/altera/socfpga/Makefile
+++ b/board/altera/socfpga/Makefile
@@ -7,4 +7,4 @@
 #
 
 obj-y	:= socfpga_cyclone5.o
-obj-$(CONFIG_SPL_BUILD) += pinmux_config.o
+obj-$(CONFIG_SPL_BUILD) += pinmux_config.o iocsr_config.o
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 27c2be9098..e02b50a4a8 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -15,7 +15,7 @@
  * High level configuration
  */
 /* Virtual target or real hardware */
-#define CONFIG_SOCFPGA_VIRTUAL_TARGET
+#undef CONFIG_SOCFPGA_VIRTUAL_TARGET
 
 #define CONFIG_ARMV7
 #define CONFIG_SYS_DCACHE_OFF