From: Jonas Karlman Date: Wed, 22 Feb 2023 22:44:41 +0000 (+0000) Subject: rockchip: rk3568: Read cpuid from otp X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=2eedb6d93fcbb5a2038c687faada51bb92aec6ea;p=u-boot.git rockchip: rk3568: Read cpuid from otp The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs. Add and use a CFG_CPUID_OFFSET to define this offset. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index 4e2d059fcf..2331641049 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -20,6 +20,18 @@ u-boot,dm-pre-reloc; status = "okay"; }; + + otp: nvmem@fe38c000 { + compatible = "rockchip,rk3568-otp"; + reg = <0x0 0xfe38c000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + status = "okay"; + + cpu_id: id@a { + reg = <0x0a 0x10>; + }; + }; }; &combphy1 { diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 26ba9deff8..88be06811c 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -289,6 +289,8 @@ config ROCKCHIP_RK3568 select DM_REGULATOR_FIXED select DM_RESET imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_OTP + imply MISC_INIT_R help The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55, including NEON and GPU, 512K L3 cache, Mali-G52 based graphics, diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index ebffb6c3ff..f1f70c81d0 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -323,7 +323,7 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #ifdef CONFIG_MISC_INIT_R __weak int misc_init_r(void) { - const u32 cpuid_offset = 0x7; + const u32 cpuid_offset = CFG_CPUID_OFFSET; const u32 cpuid_length = 0x10; u8 cpuid[cpuid_length]; int ret; diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index ae360105d5..a5e1dde508 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -6,6 +6,8 @@ #ifndef __CONFIG_RK3568_COMMON_H #define __CONFIG_RK3568_COMMON_H +#define CFG_CPUID_OFFSET 0xa + #include "rockchip-common.h" #define CFG_IRAM_BASE 0xfdcc0000 diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index ff8123dabd..b7c5c66343 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -7,6 +7,10 @@ #define _ROCKCHIP_COMMON_H_ #include +#ifndef CFG_CPUID_OFFSET +#define CFG_CPUID_OFFSET 0x7 +#endif + /* ((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512) */ #ifndef CONFIG_SPL_BUILD