From: Johan Jonker <jbx6244@gmail.com>
Date: Wed, 15 Mar 2023 18:34:13 +0000 (+0100)
Subject: clk: rockchip: clk_rk3288: add PCLK_RKPWM
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=2c2d782556e4f5d9483679d1293d8436892e9fed;p=u-boot.git

clk: rockchip: clk_rk3288: add PCLK_RKPWM

The rk3288 pwm nodes synced from Linux make use of PCLK_RKPWM
instead of PCLK_PWM. They have the same pclk_cpu parent,
so add PCLK_RKPWM to rk3288_clk_get_rate().

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # chromebook-jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 3b29992c3e..ef744c06f3 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -778,6 +778,7 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case PCLK_I2C5:
 		return gclk_rate;
 	case PCLK_PWM:
+	case PCLK_RKPWM:
 		return PD_BUS_PCLK_HZ;
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_get_clk(priv->cru);