From: Stefan Bosch Date: Sun, 18 Dec 2022 12:26:47 +0000 (+0000) Subject: arm: s5p4418: dm_serial: remove old code / add DEBUG_UART X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=28663622cf0767d0c5f31629ab50e34069bf0267;p=u-boot.git arm: s5p4418: dm_serial: remove old code / add DEBUG_UART Remove init of UART-clock and UART-reset in arch_cpu_init(). Add DEBUG_UART to s5p4418_nanopi2_defconfig. Signed-off-by: Stefan Bosch --- diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c index 7ba9c0b032..fcaafc0ff7 100644 --- a/arch/arm/cpu/armv7/s5p4418/cpu.c +++ b/arch/arm/cpu/armv7/s5p4418/cpu.c @@ -13,10 +13,8 @@ #include #include #include -#include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -45,39 +43,12 @@ static void cpu_soc_init(void) nx_tieoff_set(NX_TIEOFF_CORTEXA9MP_TOP_QUADL2C_L2RET1N_1, 1); } -#ifdef CONFIG_PL011_SERIAL -static void serial_device_init(void) -{ - char dev[10]; - int id; - - sprintf(dev, "nx-uart.%d", CONFIG_CONS_INDEX); - id = RESET_ID_UART0 + CONFIG_CONS_INDEX; - - struct clk *clk = clk_get((const char *)dev); - - /* reset control: Low active ___|--- */ - nx_rstcon_setrst(id, RSTCON_ASSERT); - udelay(10); - nx_rstcon_setrst(id, RSTCON_NEGATE); - udelay(10); - - /* set clock */ - clk_disable(clk); - clk_set_rate(clk, CFG_PL011_CLOCK); - clk_enable(clk); -} -#endif - int arch_cpu_init(void) { flush_dcache_all(); cpu_soc_init(); clk_init(); - if (IS_ENABLED(CONFIG_PL011_SERIAL)) - serial_device_init(); - return 0; } diff --git a/arch/arm/mach-nexell/clock.c b/arch/arm/mach-nexell/clock.c index 24fa204ccd..59ffa26255 100644 --- a/arch/arm/mach-nexell/clock.c +++ b/arch/arm/mach-nexell/clock.c @@ -856,7 +856,7 @@ void __init clk_init(void) } /* prevent uart clock disable for low step debug message */ - #ifndef CONFIG_DEBUG_NX_UART + #ifndef CONFIG_DEBUG_UART if (peri->dev_name) { #ifdef CONFIG_BACKLIGHT_PWM if (!strcmp(peri->dev_name, DEV_NAME_PWM)) diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig index 35e7c88059..0645b09f78 100644 --- a/configs/s5p4418_nanopi2_defconfig +++ b/configs/s5p4418_nanopi2_defconfig @@ -11,12 +11,15 @@ CONFIG_ENV_OFFSET=0x2E0200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="s5p4418-nanopi2" CONFIG_SYS_PROMPT="nanopi2# " +CONFIG_DEBUG_UART_BASE=0xC00A1000 +CONFIG_DEBUG_UART_CLOCK=150000000 CONFIG_TARGET_NANOPI2=y CONFIG_S5P4418_ONEWIRE=y CONFIG_ROOT_DEV=1 CONFIG_BOOT_PART=1 CONFIG_ROOT_PART=2 CONFIG_SYS_LOAD_ADDR=0x71080000 +CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x71000000 CONFIG_SYS_MEMTEST_END=0xb0000000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -54,7 +57,8 @@ CONFIG_MMC_DW=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y -CONFIG_CONS_INDEX=0 +CONFIG_DEBUG_UART_PL011=y +CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_VIDEO=y CONFIG_VIDEO_LOGO=y CONFIG_DISPLAY=y diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 2fa44e65fc..fec1bfd50e 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -76,11 +76,9 @@ /*----------------------------------------------------------------------- * serial console configuration */ -#define CFG_PL011_CLOCK 50000000 -#define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ - (void *)PHY_BASEADDR_UART1, \ - (void *)PHY_BASEADDR_UART2, \ - (void *)PHY_BASEADDR_UART3} + +/* 150MHz is the clock rate set by SPL (uart0) */ +#define CFG_PL011_CLOCK 150000000 /*----------------------------------------------------------------------- * BACKLIGHT