From: Michal Simek <michal.simek@xilinx.com>
Date: Wed, 26 Oct 2016 07:24:32 +0000 (+0200)
Subject: ARM64: zynqmp: List secondary software boot modes
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=2661081c305ebd1c8c44bebab57493a0ff8c06a9;p=u-boot.git

ARM64: zynqmp: List secondary software boot modes

Using alternative bootmode field to support automatic secondary boot
modes. It is purely software setting where SW modes are using free
bootmode combinations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig
index d20af04191..f354aae3fc 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -71,6 +71,8 @@ config SPL_ZYNQMP_ALT_BOOTMODE
 	default 0x5 if SD_MODE1
 	default 0x6 if EMMC_MODE
 	default 0x7 if USB_MODE
+	default 0xa if SW_USBHOST_MODE
+	default 0xb if SW_SATA_MODE
 
 choice
 	prompt "Boot mode"
@@ -101,6 +103,12 @@ config EMMC_MODE
 config USB_MODE
 	bool "USB"
 
+config SW_USBHOST_MODE
+	bool "SW USBHOST_MODE"
+
+config SW_SATA_MODE
+	bool "SW SATA_MODE"
+
 endchoice
 
 endif
diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index bdbd61380a..f5f550f9e2 100644
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -91,6 +91,10 @@ u32 spl_boot_device(void)
 #ifdef CONFIG_SPL_DFU_SUPPORT
 	case USB_MODE:
 		return BOOT_DEVICE_DFU;
+#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+	case SW_SATA_MODE:
+		return BOOT_DEVICE_SATA;
 #endif
 	default:
 		printf("Invalid Boot Mode:0x%x\n", bootmode);
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index e7738faaf8..5908c50d09 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -83,6 +83,9 @@ struct iou_scntr_secure {
 #define JTAG_MODE	0x00000000
 #define BOOT_MODE_USE_ALT	0x100
 #define BOOT_MODE_ALT_SHIFT	12
+/* SW secondary boot modes 0xa - 0xd */
+#define SW_USBHOST_MODE	0x0000000A
+#define SW_SATA_MODE	0x0000000B
 
 #define ZYNQMP_IOU_SLCR_BASEADDR	0xFF180000