From: Marek Vasut <marex@denx.de>
Date: Mon, 8 Sep 2014 12:08:45 +0000 (+0200)
Subject: arm: socfpga: timer: Pull the timer reload value from config file
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=2110eeaf0fdf9b3b200076554d266459ca7ac26d;p=u-boot.git

arm: socfpga: timer: Pull the timer reload value from config file

The timer reload value is a property of the timer hardware and there
is no reason for this to be configurable. Place this into the timer
driver just like on the other hardware.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
---

diff --git a/arch/arm/cpu/armv7/socfpga/timer.c b/arch/arm/cpu/armv7/socfpga/timer.c
index 58fc789e64..253cde39d1 100644
--- a/arch/arm/cpu/armv7/socfpga/timer.c
+++ b/arch/arm/cpu/armv7/socfpga/timer.c
@@ -8,6 +8,8 @@
 #include <asm/io.h>
 #include <asm/arch/timer.h>
 
+#define TIMER_LOAD_VAL		0xFFFFFFFF
+
 static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE;
 
 /*
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 708309b08f..54343b83a4 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -195,8 +195,6 @@
 /* This timer use eosc1 where the clock frequency is fixed
  * throughout any condition */
 #define CONFIG_SYS_TIMERBASE		SOCFPGA_OSC1TIMER0_ADDRESS
-/* reload value when timer count to zero */
-#define TIMER_LOAD_VAL			0xFFFFFFFF
 /* Timer info */
 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
 #define CONFIG_SYS_TIMER_RATE		2400000