From: Sergiu Moga <sergiu.moga@microchip.com>
Date: Fri, 1 Apr 2022 09:27:23 +0000 (+0300)
Subject: ARM: dts: at91: Add RSTC node
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=2016585c3a9486ea438145f47a28ee7fa8f7060c;p=u-boot.git

ARM: dts: at91: Add RSTC node

Add node for RSTC.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---

diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index be44519934..733cc5cec9 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -223,6 +223,12 @@
 				status = "okay";
 			};
 
+			reset_controller: rstc@fffffe00 {
+				compatible = "microchip,sam9x60-rstc";
+				reg = <0xfffffe00 0x10>;
+				clocks = <&clk32 0>;
+			};
+
 			pit: timer@fffffe40 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffe40 0x10>;
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index b7c261ebe9..7015bd7f6d 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -232,6 +232,13 @@
 			clocks = <&clk32k 0>;
 		};
 
+		reset_controller: rstc@e001d000 {
+			compatible = "microchip,sama7g5-rstc", "microchip,sam9x60-rstc";
+			reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
+			#reset-cells = <1>;
+			clocks = <&clk32k 0>;
+		};
+
 		clk32k: clock-controller@e001d050 {
 			compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
 			reg = <0xe001d050 0x4>;