From: Michal Simek Date: Thu, 14 Jul 2016 13:07:54 +0000 (+0200) Subject: ARM64: zynqmp: Enable CLK and SPL_CLK by default X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=1f29738ad13ad178185490db0bb17ad71343e251;p=u-boot.git ARM64: zynqmp: Enable CLK and SPL_CLK by default Serial driver starts to use clk framework that's why enable it by default. Signed-off-by: Michal Simek --- diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 585b408ee3..397981a40c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -669,6 +669,8 @@ config ARCH_ZYNQMP select OF_CONTROL select DM_SERIAL select SUPPORT_SPL + select CLK + select SPL_CLK config TEGRA bool "NVIDIA Tegra" diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index fa380ef7f0..b02ab08835 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -42,8 +42,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 35226d6fd3..b11586211a 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -33,8 +33,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index cc13179a1e..d1e8778dc4 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -33,8 +33,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_NAND_ARASAN=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index 65703481ae..4342e0546b 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -29,8 +29,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index e1fc8b0ee2..06c07c128a 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -28,8 +28,6 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig index 2829029685..140b800172 100644 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@ -32,8 +32,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y CONFIG_SPI_FLASH=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 92633d6fcc..727e22c267 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -32,8 +32,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y CONFIG_SPI_FLASH=y