From: Ioana Ciornei <ioana.ciornei@nxp.com>
Date: Tue, 28 Feb 2023 16:32:10 +0000 (+0200)
Subject: arch: arm: dst: fsl-ls2080a.dts: sync serial nodes with Linux
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=1d37e4a18b24db66e6dde87b3d56cbccb3758dbf;p=u-boot.git

arch: arm: dst: fsl-ls2080a.dts: sync serial nodes with Linux

Sync the serial nodes of the LS208XA RDB/QDS boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---

diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 2ee426acfd..03ef5d5cf6 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -6,18 +6,32 @@
  * Copyright 2013-2015 Freescale Semiconductor, Inc.
  */
 
+#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
+
 / {
 	compatible = "fsl,ls2080a";
 	interrupt-parent = <&gic>;
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	aliases {
+		serial0 = &serial0;
+		serial1 = &serial1;
+	};
+
 	memory@80000000 {
 		device_type = "memory";
 		reg = <0x00000000 0x80000000 0 0x80000000>;
 		      /* DRAM space - 1, size : 2 GB DRAM */
 	};
 
+	sysclk: sysclk {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <100000000>;
+		clock-output-names = "sysclk";
+	};
+
 	gic: interrupt-controller@6000000 {
 		compatible = "arm,gic-v3";
 		reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
@@ -42,20 +56,27 @@
 		ranges;
 		dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
 
+		clockgen: clocking@1300000 {
+			compatible = "fsl,ls2080a-clockgen";
+			reg = <0 0x1300000 0 0xa0000>;
+			#clock-cells = <2>;
+			clocks = <&sysclk>;
+		};
+
 		serial0: serial@21c0500 {
-			device_type = "serial";
 			compatible = "fsl,ns16550", "ns16550a";
 			reg = <0x0 0x21c0500 0x0 0x100>;
-			clock-frequency = <0>;	/* Updated by bootloader */
-			interrupts = <0 32 0x1>; /* edge triggered */
+			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+					    QORIQ_CLK_PLL_DIV(4)>;
+			interrupts = <0 32 0x4>; /* Level high type */
 		};
 
 		serial1: serial@21c0600 {
-			device_type = "serial";
 			compatible = "fsl,ns16550", "ns16550a";
 			reg = <0x0 0x21c0600 0x0 0x100>;
-			clock-frequency = <0>;	/* Updated by bootloader */
-			interrupts = <0 32 0x1>; /* edge triggered */
+			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+					    QORIQ_CLK_PLL_DIV(4)>;
+			interrupts = <0 32 0x4>; /* Level high type */
 		};
 	};